393 lines
9.7 KiB
C
393 lines
9.7 KiB
C
#include "rfm69.h"
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int8_t rssi;
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uint8_t i;
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uint8_t len_payload;
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uint32_t msg_hash;
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uint8_t p_hash_1;
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uint8_t p_hash_2;
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uint8_t p_hash_3;
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uint8_t c_hash_1;
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uint8_t c_hash_2;
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uint8_t c_hash_3;
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bool cond_1;
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bool cond_2;
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bool cond_3;
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bool cond_4;
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bool cond_5;
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DATA_SEND_STATUS send_message(tx_rx_data_struct tx_data)
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{
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// uart_print_tx_rx_data(tx_data);
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rfm69_write_msg(tx_data);
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p_hash_1 = tx_data.msg[57];
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p_hash_2 = tx_data.msg[58];
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p_hash_3 = tx_data.msg[59];
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for (uint8_t i = 0; i < 10; i++) {
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bool result = wait_rx_payload_ready_timeout(250);
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if (result) {
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RX_DATA = rfm69_read_msg();
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#if DO_UART
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uart_sendString("Message received\n");
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uart_print_tx_rx_data(RX_DATA);
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#endif
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c_hash_1 = RX_DATA.msg[0];
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c_hash_2 = RX_DATA.msg[1];
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c_hash_3 = RX_DATA.msg[2];
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cond_1 = (p_hash_1 == c_hash_1) && (p_hash_2 == c_hash_2) && (p_hash_3 == c_hash_3);
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cond_2 = (tx_data.from == RX_DATA.to) && (tx_data.to == RX_DATA.from);
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cond_3 = cond_1 && cond_2;
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if (cond_3 && (RX_DATA.flags == MSG_RECV_COUNTS_SUCCESS) && (RX_DATA.msg[3] == 0xFF)) {
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return DATA_SEND_SUCCESS;
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break;
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} else if (
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cond_3 && (RX_DATA.flags == MSG_RECV_COUNTS_FAIL) && (RX_DATA.msg[3] == 0x00)) {
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} else {
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}
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} else {
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}
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}
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return DATA_NOT_SENT;
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}
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void uart_print_tx_rx_data(tx_rx_data_struct tx_rx_print)
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{
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// uart_print_uint8(tx_rx_print.len, "LEN; ");
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// uart_print_uint8(tx_rx_print.to, "TO;");
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// uart_print_uint8(tx_rx_print.from, "FROM;");
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// uart_print_uint8(tx_rx_print.dtype, "DTYPE;");
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// uart_print_uint8(tx_rx_print.flags, "FLAGS;");
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DATA_BUFFER_7[0] = tx_rx_print.len;
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DATA_BUFFER_7[1] = tx_rx_print.to;
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DATA_BUFFER_7[2] = tx_rx_print.from;
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DATA_BUFFER_7[3] = tx_rx_print.dtype;
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DATA_BUFFER_7[4] = tx_rx_print.flags;
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uart_print_uint8_array(DATA_BUFFER_7, 5, "LEN,TO,FROM,DTYPE,FLAGS\n");
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uart_sendStringArray(tx_rx_print.msg, tx_rx_print.len);
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uart_sendChar('\n');
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uart_print_uint8_array(tx_rx_print.msg, tx_rx_print.len, "\n");
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}
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void rfm69_write_msg(tx_rx_data_struct txrxd)
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{
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set_rfm69_rx_mode();
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set_rfm69_tx_mode();
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spi_rfm69_select(true);
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spi_write(REG_FIFO | RFM69_SPI_WRITE);
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if (txrxd.len > (60)) {
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txrxd.len = 60;
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}
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spi_write(txrxd.len + 4);
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spi_write(txrxd.to);
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spi_write(txrxd.from);
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spi_write(txrxd.dtype);
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spi_write(txrxd.flags);
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for (uint8_t x = 0; x < txrxd.len; x++) {
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spi_write(txrxd.msg[x]);
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}
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spi_rfm69_select(false);
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wait_tx_sent();
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set_rfm69_rx_mode();
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}
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tx_rx_data_struct rfm69_read_msg()
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{
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memset(RX_DATA.msg, ' ', sizeof(RX_DATA.msg));
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spi_rfm69_select(true);
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spi_write(REG_FIFO);
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RX_DATA.len = spi_read() - 4;
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RX_DATA.to = spi_read();
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RX_DATA.from = spi_read();
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RX_DATA.dtype = spi_read();
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RX_DATA.flags = spi_read();
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uint8_t len_f = RX_DATA.len;
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for (uint8_t idx_f = 0; idx_f < len_f; idx_f++) {
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RX_DATA.msg[idx_f] = spi_read();
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}
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spi_rfm69_select(false);
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set_rfm69_idle();
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return RX_DATA;
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}
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void rfm69_set_state(bool state)
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{
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SET_PIN_OUT(DDRC, DDC2);
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if (!state) {
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SET_PIN_HIGH(PORTC, PC2);
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} else {
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SET_PIN_LOW(PORTC, PC2);
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}
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}
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uint8_t spi_read_rfm69_rt(uint8_t reg)
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{
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spi_rfm69_select(true);
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spi_write(reg);
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uint8_t data_read = spi_read(0xFF);
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spi_rfm69_select(false);
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return data_read;
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}
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uint8_t spi_write_rfm69_rt(uint8_t reg, uint8_t val)
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{
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spi_rfm69_select(true);
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spi_write(reg | RFM69_SPI_WRITE);
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uint8_t data_read = spi_write(val);
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spi_rfm69_select(false);
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return data_read;
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}
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uint8_t spi_write_rfm69_multiple_rt(uint8_t reg, const char* vals, uint8_t len)
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{
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spi_rfm69_select(true);
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uint8_t data_init = spi_write(reg | RFM69_SPI_WRITE);
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while (len--)
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spi_write(*vals++);
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spi_rfm69_select(false);
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return data_init;
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}
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// name (max 10), 10
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// diameter (max 10), 20
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// battery_value 16-bit, 22
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// time_reading (min) 23
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// time_reading (hour) 24
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// time_reading (day) 25
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// time_reading (month) 26
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// time_reading (year) 27
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// 15 * per-min +30 57
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// three byte hash check 3
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tx_rx_data_struct generate_wheel_counts_message(
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identifier_results idd, time_struct time, uint16_t battery_value, volatile uint16_t counts[15])
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{
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reset_txrx_struct(&TX_DATA);
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memcpy(TX_DATA.msg, idd.name_str, MIN(10, idd.name_len));
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memcpy(TX_DATA.msg + 10, idd.diameter_str, MIN(10, idd.diameter_len));
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TX_DATA.msg[20] = battery_value & 0xFF;
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TX_DATA.msg[21] = (battery_value >> 8) & 0xFF;
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TX_DATA.msg[22] = time.Minute;
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TX_DATA.msg[23] = time.Hour;
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TX_DATA.msg[24] = time.Day;
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TX_DATA.msg[25] = time.Month;
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TX_DATA.msg[26] = time.Year;
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for (uint8_t idx = 0; idx < 15; idx++) {
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TX_DATA.msg[26 + (2 * idx + 1)] = counts[idx] & 0xFF; // LSB first
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TX_DATA.msg[26 + (2 * idx + 2)] = (counts[idx] >> 8) & 0xFF; // MSB second
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}
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msg_hash = hash_3bytes(TX_DATA.msg, 57);
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TX_DATA.msg[57] = msg_hash & 0xFF;
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TX_DATA.msg[58] = (msg_hash >> 8) & 0xFF;
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TX_DATA.msg[59] = (msg_hash >> 16) & 0xFF;
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TX_DATA.len = sizeof(TX_DATA.msg);
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TX_DATA.flags = MSG_SEND_COUNTS;
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TX_DATA.from = idd.hashed;
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TX_DATA.to = 255;
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TX_DATA.dtype = MSG_TYPE_BINARY;
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return TX_DATA;
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}
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uint32_t hash_3bytes(unsigned const char* str, uint8_t str_len)
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{
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uint32_t hash = 0;
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for (i = 0; i < str_len; i++) {
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hash = (hash * 31 + str[i]) % 0xFFFFFF;
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}
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return hash;
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}
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void set_rfm69_power_amp_boost()
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{
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spi_write_rfm69_rt(REG_TEST_PA1, VAL_TEST_PA1_BOOST);
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spi_write_rfm69_rt(REG_TEST_PA2, VAL_TEST_PA2_BOOST);
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}
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void set_rfm69_power_amp_normal()
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{
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spi_write_rfm69_rt(REG_TEST_PA1, VAL_TEST_PA1_NORMAL);
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spi_write_rfm69_rt(REG_TEST_PA2, VAL_TEST_PA2_NORMAL);
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};
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void reset_txrx_struct(tx_rx_data_struct* s)
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{
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s->len = 0;
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s->to = 255;
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s->from = 255;
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s->dtype = 0;
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s->flags = 0;
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memset(s->msg, ' ', 60);
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}
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void set_rfm69_mode(uint8_t target_mode)
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{
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uint8_t mode = spi_read_rfm69_rt(REG_OP_MODE);
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mode &= ~VAL_OPMODE_MASK;
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mode |= (target_mode & VAL_OPMODE_MASK);
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spi_write_rfm69_rt(REG_OP_MODE, mode);
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}
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void wait_tx_sent()
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{
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while (TX_NOT_SENT)
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;
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}
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uint8_t hash(const char* str, uint8_t min, uint8_t max)
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{
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unsigned int hash = 0;
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while (*str) {
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hash = (hash * 31) + (unsigned char)(*str);
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str++;
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}
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unsigned int range = max - min + 1;
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return (hash % range) + min;
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}
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bool wait_rx_payload_ready_timeout(uint16_t attempts)
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{
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set_rfm69_rx_mode();
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uint16_t counter = 0;
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while (1) {
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_delay_ms(1);
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WHILE_BREAK(counter, attempts);
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if (RX_PAYLOAD_READY) {
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return true;
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break;
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}
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}
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return false;
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;
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}
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void wait_rx_payload_ready()
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{
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while (RX_PAYLOAD_NOT_READY) { };
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}
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void wait_rfm69_mode_ready()
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{
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while (MODE_NOT_READY)
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;
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}
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void set_rfm69_tx_mode()
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{
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set_rfm69_power_amp_boost();
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set_rfm69_mode(VAL_OPMODE_TX);
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wait_rfm69_mode_ready();
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};
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void set_rfm69_rx_mode()
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{
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set_rfm69_power_amp_normal();
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set_rfm69_mode(VAL_OPMODE_RX);
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wait_rfm69_mode_ready();
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};
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void set_rfm69_standby()
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{
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set_rfm69_power_amp_normal();
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set_rfm69_mode(VAL_OPMODE_STDBY);
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wait_rfm69_mode_ready();
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}
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void set_rfm69_sleep()
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{
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set_rfm69_power_amp_normal();
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set_rfm69_mode(VAL_OPMODE_SLEEP);
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wait_rfm69_mode_ready();
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}
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void set_rfm69_idle()
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{
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set_rfm69_power_amp_normal();
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set_rfm69_mode(VAL_OPMODE_STDBY);
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wait_rfm69_mode_ready();
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}
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void reset_rfm69()
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{
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rfm69_reset_state(true);
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_delay_ms(10);
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rfm69_reset_state(false);
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_delay_ms(10);
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}
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void set_rfm69_tx_power()
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{
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uint8_t PA_LEVEL_SET
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= VAL_PALEVEL_PA1_ON | VAL_PALEVEL_PA2_ON | ((20 + 14) & VAL_PALEVEL_PA1_OUTPUTPOWER);
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spi_write_rfm69_rt(REG_PA_LEVEL, PA_LEVEL_SET);
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}
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void rfm69_init()
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{
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reset_rfm69();
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_delay_ms(100);
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set_rfm69_idle();
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spi_write_rfm69_rt(REG_FREQ_MSB, VAL_FREQ_433MHz_MSB);
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spi_write_rfm69_rt(REG_FREQ_MIDDLE_SB, VAL_FREQ_433MHz_MID_SB);
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spi_write_rfm69_rt(REG_FREQ_LSB, VAL_FREQ_433MHz_LSB);
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spi_write_rfm69_rt(REG_FREQ_DEV_MSB, VAL_FREQ_DEV_MSB);
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spi_write_rfm69_rt(
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REG_FIFO_THRESH,
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VAL_TX_START_FIFO_NOT_EMPTY | VAL_FIFO_LEVEL_INTERRUPT); // TX condition
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spi_write_rfm69_rt(REG_TEST_DAGC,
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VAL_TEST_DAGC_DEFAULT); // Fading margin improvement
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char sync_words[] = { 0x2d, 0xd4 };
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spi_write_rfm69_multiple_rt(REG_SYNC_VALUE_1, sync_words, 2);
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spi_write_rfm69_rt(REG_SYNC_CONFIG, VAL_SYNCWORDS_ON | VAL_SYNCWORDS_SIZE_2_BYTES);
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spi_write_rfm69_rt(REG_DATA_MODUL,
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VAL_DATA_PACKET_MODE | VAL_DATA_MODUL_OOK); // RegDataModul
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spi_write_rfm69_rt(REG_BITRATE_MSB,
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VAL_BITRATE_250kbps_MSB); // RegBitrateMSB
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spi_write_rfm69_rt(REG_BITRATE_LSB,
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VAL_BITRATE_250kbps_LSB); // RegbBitrateLSB
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spi_write_rfm69_rt(REG_FDEV_MSB, 0x10); // RegFdevMSB
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spi_write_rfm69_rt(REG_FDEV_LSB, 0x00); // RegFdevLSB
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spi_write_rfm69_rt(REG_RX_BW, 0xE0); // RegRxBw
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spi_write_rfm69_rt(REG_AFC_BW, 0xE0); // RegAfcBw
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spi_write_rfm69_rt(
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REG_PACKET_CONFIG_1,
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VAL_PACKET_VARIABLE_LENGTH | VAL_PACKET_WHITENING | VAL_PACKET_CRCON); // RegPacketConfig1
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spi_write_rfm69_rt(REG_PREAMBLE_MSB, 0x00); // RegPreambleMSB
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spi_write_rfm69_rt(REG_PREAMBLE_LSB, 0x04); // RegPreambleLSB
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spi_write_rfm69_rt(REG_PA_LEVEL,
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VAL_PA_PA1_ON | VAL_PA_PA2_ON | VAL_PA_20dB); // RegPaLevel
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}
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