From bbdcc1e6231948491a71ebbd7d17585319d40737 Mon Sep 17 00:00:00 2001 From: "Ishan S. Patel" Date: Mon, 31 Aug 2026 23:04:00 -0400 Subject: [PATCH] Refactor firmware for clarity; no functional changes - main.c: file-header comment describing the hardware and operation, logic split into named phases (sleep_until_interrupt, wake_peripheral_rails, take_counts_snapshot, send_wheel_counts_report, handle_minute_alarm, init_all_hardware); shared state renamed to say what it is and made static. - rfm69.c: reorganized into six labeled sections; cond_1/2/3 and hash scratch globals replaced by a reply_acknowledges() helper with clear locals; packet layout and every init register write documented. - LOG() macro (compiled out when DO_UART is off) replaces the #if DO_UART blocks that obscured the logic. - Drivers: file-header comments; named RTC_REG_*/RTC_ALM_MASK_BIT constants; EEPROM spool scheme documented; ADC_CHANNEL_BANDGAP named; repeated pin if/else helpers collapsed to SET_PIN_TO(). - Removed unused globals/buffers and commented-out code; ran clang-format with the project style. Register writes and radio protocol are byte-identical. Builds clean under -Wall -Wextra on gnu17 and c23; flash 13028 -> 12830 B, static RAM 1038 -> 999 B. Co-Authored-By: Claude Opus 5 Claude-Session: https://claude.ai/code/session_01YVJKatfeMJjAmuH9KYiLuv --- avr_code/adc.c | 81 +- avr_code/adc.h | 13 +- ... ispatel@live.com 2025-02-20-21-50-56).txt | 1020 ----------------- avr_code/defines.c | 18 +- avr_code/defines.h | 51 +- avr_code/i2c.c | 2 + avr_code/i2c.h | 40 +- avr_code/interrupts.c | 21 +- avr_code/interrupts.h | 29 +- avr_code/m95128.c | 24 +- avr_code/m95128.h | 3 +- avr_code/main.c | 455 ++++---- avr_code/max31329.c | 45 +- avr_code/max31329.h | 10 + avr_code/ndef.c | 15 +- avr_code/ndef.h | 8 +- avr_code/power_mgmt.c | 3 +- avr_code/power_mgmt.h | 14 +- avr_code/rfm69.c | 558 ++++----- avr_code/spi.c | 26 +- avr_code/spi.h | 3 +- avr_code/st25dv.c | 42 +- avr_code/st25dv.h | 6 +- avr_code/states.c | 97 +- avr_code/states.h | 39 +- 25 files changed, 825 insertions(+), 1798 deletions(-) delete mode 100644 avr_code/debug/default/queuelogs/debugtool (SFConflict ispatel@live.com 2025-02-20-21-50-56).txt diff --git a/avr_code/adc.c b/avr_code/adc.c index 9736873..5f47f84 100644 --- a/avr_code/adc.c +++ b/avr_code/adc.c @@ -11,10 +11,10 @@ int8_t adc_Initialize(void) { - //REFS VAL_0x01; ADLAR disabled; MUX adc0; + // REFS VAL_0x01; ADLAR disabled; MUX adc0; ADMUX = 0x40; - //ACME disabled; ADTS VAL_0x00; + // ACME disabled; ADTS VAL_0x00; ADCSRB = 0x00; ADCSRA = (1 << ADEN) | ADC_PRESCALER_64; @@ -22,66 +22,51 @@ int8_t adc_Initialize(void) return 0; } -void adc_Disable(void) -{ - ADCSRA &= ~(1 << ADEN); -} - -void adc_Enable(void) -{ - ADCSRA |= (1 << ADEN); -} +void adc_Disable(void) { ADCSRA &= ~(1 << ADEN); } +void adc_Enable(void) { ADCSRA |= (1 << ADEN); } void adc_StartConversion(uint8_t channel) { - if (channel == 0) - { - - ADMUX=0b01000000; + if (channel == 0) { + + ADMUX = 0b01000000; + } else if (channel == ADC_CHANNEL_BANDGAP) { + // ADMUX=0b01001110; + ADMUX = (0x01 << REFS0) | (0 << ADLAR) | (0x0e << MUX0); + } else { + ADMUX &= ~0x0f; + ADMUX |= channel; } - else if (channel == 14) - { -// ADMUX=0b01001110; - ADMUX=(0x01 << REFS0) | (0< ADC_CONVERSION_TIMEOUT) { - return 0; - } - _delay_us(10); - } + // A conversion is 13 ADC clocks (~104 us at 125 kHz); bail out rather than + // hang if the ADC is disabled or its clock is gated off. + uint16_t attempts = 0; + while (!adc_IsConversionDone()) { + if (++attempts > ADC_CONVERSION_TIMEOUT) { + return 0; + } + _delay_us(10); + } - uint16_t res = adc_GetConversionResult(); - ADCSRA |= (1 << ADIF); - return res; + uint16_t res = adc_GetConversionResult(); + ADCSRA |= (1 << ADIF); + return res; } diff --git a/avr_code/adc.h b/avr_code/adc.h index 78a5fea..67f961a 100644 --- a/avr_code/adc.h +++ b/avr_code/adc.h @@ -1,4 +1,4 @@ -/* +/* * File: adc.h * Author: thebears * @@ -6,17 +6,19 @@ */ #ifndef ADC_H -#define ADC_H +#define ADC_H #include "defines.h" #include #include #include #include -#ifdef __cplusplus +#ifdef __cplusplus extern "C" { #endif +// Mux channel 14 is the internal 1.1 V bandgap, used to infer battery voltage. +#define ADC_CHANNEL_BANDGAP 14 int8_t adc_Initialize(void); void adc_Enable(void); @@ -26,9 +28,8 @@ bool adc_IsConversionDone(void); uint16_t adc_GetConversionResult(void); uint16_t adc_GetConversion(uint8_t channel); -#ifdef __cplusplus +#ifdef __cplusplus } #endif -#endif /* ADC_H */ - +#endif /* ADC_H */ diff --git a/avr_code/debug/default/queuelogs/debugtool (SFConflict ispatel@live.com 2025-02-20-21-50-56).txt b/avr_code/debug/default/queuelogs/debugtool (SFConflict ispatel@live.com 2025-02-20-21-50-56).txt deleted file mode 100644 index caba78f..0000000 --- a/avr_code/debug/default/queuelogs/debugtool (SFConflict ispatel@live.com 2025-02-20-21-50-56).txt +++ /dev/null @@ -1,1020 +0,0 @@ -2659 1739748928187 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 08 95 0E 94 1C 22 80 93 6A 06 88 23 49 F0 81 50 80 93 69 06 0E 94 00 23 80 91 6A 06 0E 94 7E 21 08 95 60 95 70 95 80 95 90 95 30 95 40 95 50 95 21 95 3F 4F 4F 4F 5F 4F 6F 4F 7F 4F 8F 4F 9F 4F 08 95 CF 93 DF 93 EC 01 88 81 88 23 31 F0 21 96 0E 94 2D 23 89 91 81 11 FB CF DF 91 CF 91 08 95 CF 93 DF 93 0F 92 CD B7 DE B7 AE 01 4F 5F 5F 4F 0E 94 F8 23 89 81 0F 90 DF 91 CF 91 08 95 CF 93 -2659 1739748928192 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928192 pro JtagIce3 [0x11] <<< 06 00 00 22 00 -2659 1739748928193 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928193 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 DF 93 90 E4 89 9F E0 01 11 24 8D 2F 0E 94 53 20 8C 2F 0E 94 53 20 DF 91 CF 91 08 95 CF 93 C8 2F 81 E0 0E 94 58 21 6C 2F 6C 71 83 7E 68 2B 81 E0 0E 94 B2 20 CF 91 08 95 CF 93 DF 93 C1 EF D4 E0 18 82 41 E0 BE 01 80 E0 0E 94 34 1D 88 81 DF 91 CF 91 08 95 F8 94 A8 95 E0 E6 F0 E0 80 81 88 61 80 83 85 E0 80 83 80 81 80 64 80 83 78 94 08 95 0E 94 07 20 0E 94 E9 23 88 23 E1 F3 0E 94 9C 23 -2659 1739748928198 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928198 pro JtagIce3 [0x11] <<< 06 00 00 22 40 -2659 1739748928199 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928199 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 EA E7 F0 E0 20 81 20 61 20 83 08 95 FC 01 AF 01 4F 5F 5F 4F 20 81 22 23 11 F0 FA 01 F8 CF 9F 01 28 1B 39 0B C9 01 08 95 68 94 01 C0 E8 94 8F 92 9F 92 CF 93 DF 93 0E 94 76 18 DF 91 CF 91 9F 90 8F 90 08 95 CF 93 DF 93 EC 01 0E 94 1C 22 68 2F CE 01 0E 94 22 1B CE 01 DF 91 CF 91 08 95 22 98 2A 9A E8 E6 F0 E0 80 81 81 60 80 83 EB E6 F0 E0 80 81 84 60 80 83 08 95 E3 E4 F6 E0 80 E8 80 83 -2659 1739748928205 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928205 pro JtagIce3 [0x11] <<< 06 00 00 22 80 -2659 1739748928206 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928206 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 81 83 82 83 23 E0 AF 01 63 E1 88 E6 0E 94 76 1C 08 95 10 92 C5 00 83 E3 80 93 C4 00 88 E0 80 93 C1 00 86 E0 80 93 C2 00 08 95 53 98 5B 9A E9 E6 F0 E0 80 81 88 60 80 83 80 81 8B 7F 80 83 E9 9A 08 95 52 98 5A 9A E9 E6 F0 E0 80 81 82 60 80 83 80 81 8E 7F 80 83 E8 9A 08 95 FC 01 2E 2F 9F 2F 81 91 86 17 21 F0 81 11 F9 CF 90 E0 08 95 82 2F 08 95 00 24 A7 FD 00 94 2A 17 30 05 40 05 50 05 -2659 1739748928211 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928211 pro JtagIce3 [0x11] <<< 06 00 00 22 C0 -2659 1739748928212 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928212 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 60 05 70 05 80 05 90 05 08 95 EC 01 0E 94 1C 24 0E 94 1B 24 CE 01 0E 94 1D 24 CE 01 0E 94 15 24 FB 01 DC 01 48 0F 59 1F A4 17 B5 07 19 F0 21 91 2D 93 FA CF 08 95 80 E4 80 93 7C 00 10 92 7B 00 81 E8 80 93 7A 00 80 E0 08 95 6D E5 8A E5 0E 94 B2 20 6C E7 8C E5 0E 94 B2 20 08 95 65 E5 8A E5 0E 94 B2 20 60 E7 8C E5 0E 94 B2 20 08 95 10 92 B9 00 88 E4 80 93 B8 00 84 E0 80 93 BC 00 08 95 -2659 1739748928217 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928217 pro JtagIce3 [0x11] <<< 06 00 00 23 00 -2659 1739748928218 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928218 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 80 93 43 06 41 E0 63 E4 76 E0 80 E0 0E 94 4B 1A 08 95 F8 94 E0 E6 F0 E0 80 81 88 61 80 83 10 82 78 94 08 95 8F 93 F8 94 1A 9B 03 C0 81 E0 80 93 70 06 8F 91 18 95 FC 01 48 0F 59 1F E4 17 F5 07 11 F0 61 93 FB CF 08 95 9C 01 21 56 31 09 2A 31 31 05 10 F4 8F 75 99 27 08 95 E0 EC F0 E0 90 81 95 FF FD CF 80 93 C6 00 08 95 0E 94 E5 22 8C E0 0E 94 0E 22 0E 94 9B 20 08 95 0E 94 EE 22 80 E1 -2659 1739748928223 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928223 pro JtagIce3 [0x11] <<< 06 00 00 23 40 -2659 1739748928224 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928224 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 0E 94 0E 22 0E 94 9B 20 08 95 39 9A 6B 9A 38 98 40 9A 80 E5 80 93 AC 00 08 95 FC 01 DB 01 2D 91 BD 01 21 93 21 11 FA CF 08 95 9C 01 21 54 31 09 2A 31 31 05 08 F4 80 62 08 95 3A 9A 88 23 11 F0 42 9A 08 95 42 98 08 95 54 9A 88 23 11 F0 5C 9A 08 95 5C 98 08 95 3B 9A 88 23 11 F0 43 9A 08 95 43 98 08 95 20 9A 81 11 02 C0 28 9A 08 95 28 98 08 95 6A 9A 81 11 02 C0 72 9A 08 95 72 98 08 95 -2659 1739748928230 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928230 pro JtagIce3 [0x11] <<< 06 00 00 23 80 -2659 1739748928231 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928231 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 55 9A 88 23 11 F0 5D 9A 08 95 5D 98 08 95 68 9A 88 23 11 F0 70 9A 08 95 70 98 08 95 26 2F BA 01 AC 01 83 E5 0E 94 22 18 08 95 27 E0 AC 01 66 E0 88 E6 0E 94 17 19 08 95 80 91 78 00 20 91 79 00 90 E0 92 2B 08 95 50 58 BB 27 AA 27 0E 94 03 17 0C 94 90 21 0E 94 05 1D 68 94 B1 11 0C 94 C0 23 08 95 00 24 0A 94 16 16 17 06 18 06 09 06 08 95 00 24 0A 94 12 16 13 06 14 06 05 06 08 95 E8 94 -2659 1739748928236 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928236 pro JtagIce3 [0x11] <<< 06 00 00 23 C0 -2659 1739748928238 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928238 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 BB 27 66 27 77 27 CB 01 97 F9 08 95 4A E0 64 E0 88 E6 0E 94 B1 21 08 95 42 E0 61 E0 88 E6 0E 94 B1 21 08 95 EA E7 F0 E0 80 81 8F 77 80 83 08 95 EA E7 F0 E0 80 81 80 68 80 83 08 95 97 F9 9F 67 80 E8 70 E0 60 E0 08 95 68 2F 88 E6 0E 94 F0 21 08 95 80 91 7A 00 82 95 81 70 08 95 0E 94 B1 1E 08 F4 81 E0 08 95 0E 94 B1 1E 08 F4 8F EF 08 95 21 E0 0E 94 17 19 08 95 8F EF 0E 94 53 20 08 95 -2659 1739748928243 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928243 pro JtagIce3 [0x11] <<< 06 00 00 24 00 -2659 1739748928244 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928244 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 80 E0 0E 94 E4 23 08 95 81 E0 0E 94 E4 23 08 95 0E 94 55 15 0C 94 90 21 0E 94 30 16 0C 94 90 21 9F EF 80 EC 08 95 0C 94 00 00 0E 94 A9 00 08 95 08 95 08 95 08 95 08 95 08 95 08 95 09 09 09 09 4D 49 4E 55 54 45 20 49 4E 54 45 52 52 55 50 54 0A 00 2D 2D 2D 2D 20 53 54 41 52 54 49 4E 47 20 2D 2D 2D 2D 0A 00 53 65 74 20 75 70 20 41 56 52 20 69 6E 74 65 72 72 75 70 74 73 0A 00 53 65 74 -2659 1739748928249 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928249 pro JtagIce3 [0x11] <<< 06 00 00 24 40 -2659 1739748928250 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928250 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 20 75 70 20 52 54 43 20 69 6E 74 65 72 72 75 70 74 73 0A 00 49 6E 69 74 69 61 6C 69 7A 65 64 20 52 46 4D 36 39 0A 00 53 65 74 20 75 70 20 6C 61 73 74 20 70 61 67 65 20 76 61 6C 75 65 20 66 6F 72 20 53 50 49 20 66 6C 61 73 68 0A 00 47 6F 74 20 6E 75 67 67 65 74 20 64 61 74 61 20 66 72 6F 6D 20 52 46 49 44 0A 00 46 61 69 6C 65 64 20 74 6F 20 67 65 74 20 74 69 6D 65 20 0A 00 53 75 63 -2659 1739748928255 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928255 pro JtagIce3 [0x11] <<< 06 00 00 24 80 -2659 1739748928256 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928256 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 63 65 73 73 20 69 6E 20 67 65 74 20 74 69 6D 65 20 0A 00 49 6E 20 6D 69 6E 75 74 65 20 69 6E 64 65 78 0A 00 54 58 20 44 41 54 41 20 53 65 6E 74 0A 00 20 20 20 20 20 20 20 54 58 20 44 41 54 41 20 6E 6F 74 20 73 65 6E 74 2C 20 77 72 69 74 69 6E 67 20 74 6F 20 53 50 49 0A 00 20 20 20 20 20 20 20 53 50 49 20 6E 6F 74 20 73 65 6E 74 0A 00 54 58 20 44 41 54 41 20 46 72 6F 6D 20 53 50 49 -2659 1739748928261 pro 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75 3A 25 30 32 75 00 0A 00 68 07 6C 09 4C 83 6A 90 74 A0 7A C0 00 80 68 88 00 84 6C 82 00 81 49 4E 46 00 69 6E 66 00 4E 41 4E 00 6E 61 6E 00 49 4E 46 00 69 6E 66 00 4E 41 4E 00 6E 61 6E 00 28 6E 75 6C 6C 29 00 -2659 1739748928280 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928280 pro JtagIce3 [0x11] <<< 06 00 00 25 40 -2659 1739748928281 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928281 pro JtagIce3 [0x11] <<< 13 00 80 C1 0A 40 4C 20 00 00 28 6E 69 6C 29 00 0A 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF -2659 1739748928282 pro JtagIce3 [0x11] >>> 13 00 -2659 1739748928282 pro JtagIce3 [0x11] <<< 06 00 00 00 00 -2659 1739748928283 pro JtagIce3 [0x11] >>> 06 00 -2659 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06 00 -2659 1739748928316 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928322 pro JtagIce3 [0x11] >>> 14 00 30 E0 40 E2 51 E4 C7 01 B6 01 0E 94 0C 24 2B 01 3C 01 D5 01 C4 01 84 19 95 09 A6 09 B7 09 B7 FF 07 C0 B0 95 A0 95 90 95 81 95 9F 4F AF 4F BF 4F 02 97 A1 05 B1 05 44 F4 89 81 9A 81 01 96 9A 83 89 83 73 01 62 01 DB CF A5 01 94 01 C3 01 B2 01 0E 94 EE 23 87 FD F0 CF 8D 81 9E 81 AF 81 B8 85 8C 19 9D 09 AE 09 BF 09 01 96 A1 1D B1 1D 03 97 A1 05 B1 05 08 F4 49 C0 1E 82 1D 82 A5 01 94 01 00 -2659 1739748928322 pro JtagIce3 [0x11] <<< 06 00 00 01 80 -2659 1739748928323 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928323 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928328 pro JtagIce3 [0x11] >>> 14 00 C7 01 B6 01 0E 94 F3 23 18 16 0C F0 40 C0 E9 81 FA 81 E4 3D FE 4F E4 F4 4D 81 5E 81 45 2B C1 F4 20 E0 30 E0 40 E8 5A E5 C5 01 B4 01 0E 94 0C 24 4B 01 5C 01 20 E0 30 E0 40 E8 5A E5 C7 01 B6 01 0E 94 0C 24 6B 01 7C 01 81 E0 90 E0 9E 83 8D 83 20 E0 30 E0 40 E2 51 E4 C7 01 B6 01 0E 94 08 24 6B 01 7C 01 E9 81 FA 81 31 97 FA 83 E9 83 D5 01 C4 01 8C 19 9D 09 AE 09 BF 09 01 96 A1 1D B1 1D 00 -2659 1739748928328 pro JtagIce3 [0x11] <<< 06 00 00 01 C0 -2659 1739748928329 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928329 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928335 pro JtagIce3 [0x11] >>> 14 00 03 97 A1 05 B1 05 08 F0 B9 CF 46 01 57 01 28 8D 02 2E 00 0C 33 0B 39 8F 28 8F C9 01 0E 94 55 23 8A 8F 17 FD 03 C0 1E 83 0D 83 04 C0 46 E0 50 E0 5E 83 4D 83 5A 8D 57 36 41 F4 01 2B 09 F0 4C C2 81 E0 90 E0 9E 83 8D 83 47 C2 4A 8D 4F 87 06 C0 29 81 3A 81 37 FF 52 C2 56 E6 5F 87 8D 81 9E 81 01 96 9E 83 8D 83 9F 85 96 36 B9 F4 E9 81 FA 81 F7 FF 08 C0 C1 2C D1 2C 90 E8 E9 2E 9F E3 F9 2E 00 -2659 1739748928335 pro JtagIce3 [0x11] <<< 06 00 00 02 00 -2659 1739748928336 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928336 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928341 pro JtagIce3 [0x11] >>> 14 00 1A 82 19 82 FA 8D F7 36 41 F0 2D 81 3E 81 49 81 5A 81 24 0F 35 1F 3E 83 2D 83 1C 2D DD A2 EB A2 0F 2D 8B 86 9C 86 AD 86 BE 86 1D 8A 1C 8A 8C 89 9D 89 ED 81 FE 81 8E 17 9F 07 DC F5 21 2F 3D A1 4B A1 50 2F 6B 85 7C 85 8D 85 9E 85 0E 94 08 24 0E 94 72 14 2B 01 3C 01 0E 94 AA 23 6B 8F A3 01 92 01 61 2F 7D A1 8B A1 90 2F 0E 94 0C 24 2B 85 3C 85 4D 85 5E 85 0E 94 A3 23 9B 01 AC 01 50 58 00 -2659 1739748928341 pro JtagIce3 [0x11] <<< 06 00 00 02 40 -2659 1739748928342 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928342 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928348 pro JtagIce3 [0x11] >>> 14 00 2B 87 3C 87 4D 87 5E 87 20 E0 30 E0 40 E2 51 E4 61 2F 7D A1 8B A1 90 2F 0E 94 08 24 16 2F 7D A3 8B A3 09 2F 4C 89 5D 89 4F 5F 5F 4F 5D 8B 4C 8B BE CF 20 E0 30 E0 40 EA 50 E4 61 2F 7D A1 8B A1 90 2F 0E 94 0C 24 2B 01 3C 01 9B 01 AC 01 6B 85 7C 85 8D 85 9E 85 0E 94 EE 23 87 FD 0D C0 A3 01 92 01 6B 85 7C 85 8D 85 9E 85 0E 94 EE 23 81 11 06 C0 FB 8D F0 FD 03 C0 41 2C 51 2C 32 01 A5 01 00 -2659 1739748928348 pro JtagIce3 [0x11] <<< 06 00 00 02 80 -2659 1739748928349 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928349 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928354 pro JtagIce3 [0x11] >>> 14 00 94 01 C3 01 B2 01 0E 94 A4 23 4B 01 5C 01 20 E0 30 E0 40 E2 51 E4 C7 01 B6 01 0E 94 0C 24 6B 87 7C 8B 18 2F 09 2F 9B 01 48 2F 59 2F C5 01 B4 01 0E 94 F3 23 87 FD 14 C0 29 81 3A 81 2F 5F 3F 4F 3A 83 29 83 3F 85 36 36 79 F4 4D 81 5E 81 4F 5F 5F 4F 5E 83 4D 83 5B 85 5D A3 8C 89 8E A3 0B C0 CB 86 DC 8A 1E 2D 0F 2D 9F 85 95 36 39 F0 EB 85 ED A3 FC 89 FE A3 E9 80 FA 80 06 C0 2B 85 2D A3 00 -2659 1739748928354 pro JtagIce3 [0x11] <<< 06 00 00 02 C0 -2659 1739748928355 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928355 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928361 pro JtagIce3 [0x11] >>> 14 00 3C 89 3E A3 E1 2C F1 2C 48 88 59 88 C1 2C D1 2C 1D 8A 1C 8A 1C 86 1B 86 49 85 5A 85 40 71 55 27 5C A3 4B A3 2B 85 3C 85 4D 81 5E 81 24 17 35 07 34 F0 8C 89 9D 89 89 2B 09 F4 94 C0 9F C0 32 01 EE 89 FF 89 80 85 91 85 05 97 48 16 59 06 88 F7 2D A1 3E A1 41 2F 50 2F C5 01 B4 01 0E 94 08 24 0E 94 72 14 6B 8F 7C 8F 8D 8F 9E 8F 0E 94 AA 23 6A 30 71 05 14 F0 69 E0 70 E0 8B A1 9C A1 89 2B 00 -2659 1739748928361 pro JtagIce3 [0x11] <<< 06 00 00 03 00 -2659 1739748928362 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928362 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928367 pro JtagIce3 [0x11] >>> 14 00 69 F4 61 15 71 05 51 F4 9A 8D 97 36 39 F4 F7 FE 05 C0 36 01 EF EF 6E 1A 7E 0A 38 C0 2C 89 3D 89 23 2B 99 F4 F7 FE 11 C0 3F EF 43 1A 53 0A F1 01 E6 0D F7 1D 4E E2 40 83 8B 81 9C 81 01 97 9C 83 8B 83 E1 E0 F0 E0 FD 8B EC 8B F1 01 E4 0D F5 1D 36 01 61 14 71 04 31 F0 20 E3 21 93 31 E0 63 1A 71 08 F7 CF C6 01 84 0D 95 1D 2B 81 3C 81 2C 19 3D 09 2C 01 4F EF 44 1A 54 0A F1 01 E8 0F F9 1F 00 -2659 1739748928367 pro JtagIce3 [0x11] <<< 06 00 00 03 40 -2659 1739748928368 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928368 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928374 pro JtagIce3 [0x11] >>> 14 00 60 5D 60 83 C9 01 01 97 9C 83 8B 83 2B 8D 3C 8D 4D 8D 5E 8D 6D A1 7E A1 81 2F 90 2F 0E 94 0C 24 A5 01 94 01 0E 94 A3 23 4B 01 5C 01 B7 FA B0 94 B7 F8 B0 94 20 E0 30 E0 40 E2 51 E4 6D A1 7E A1 81 2F 90 2F 0E 94 08 24 6D A3 7E A3 18 2F 09 2F 91 E0 E9 1A F1 08 EB 85 FC 85 31 96 FC 87 EB 87 63 01 60 CF F9 85 F4 FF 09 C0 F1 01 E4 0D F5 1D 8E E2 80 83 92 01 2F 5F 3F 4F 29 01 A1 01 44 0D 00 -2659 1739748928374 pro JtagIce3 [0x11] <<< 06 00 00 03 80 -2659 1739748928375 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928375 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928380 pro JtagIce3 [0x11] >>> 14 00 55 1D 5E 83 4D 83 FA 01 10 82 FF 85 F5 36 09 F0 61 C0 E9 A1 FA A1 E2 0D F3 1D 31 97 10 82 29 81 3A 81 37 FF 08 C0 31 95 21 95 31 09 3A 83 29 83 01 E0 10 E0 02 C0 00 E0 10 E0 E9 A1 FA A1 31 97 E2 0D F3 1D 22 E0 30 E0 8A E0 E8 2E F1 2C CF 01 82 19 93 09 49 81 5A 81 45 2B 91 F0 89 81 9A 81 B7 01 0E 94 30 21 80 5D 82 93 69 83 7A 83 21 50 31 09 4B 81 5C 81 41 50 51 09 5C 83 4B 83 E7 CF 00 -2659 1739748928380 pro JtagIce3 [0x11] <<< 06 00 00 03 C0 -2659 1739748928381 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928381 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928387 pro JtagIce3 [0x11] >>> 14 00 12 16 13 06 5C F3 FC 01 31 97 E2 0D F3 1D 01 2B 11 F4 2B E2 01 C0 2D E2 20 83 02 97 B1 01 68 0F 79 1F 28 8D 39 8D 21 54 31 09 2A 31 31 05 10 F0 25 E6 01 C0 25 E4 FB 01 20 83 2B 81 3C 81 22 50 31 09 3C 83 2B 83 48 16 59 06 24 F4 8D 81 9E 81 0E 94 4D 23 39 85 31 FF 29 C0 30 FD 27 C0 4B 81 5C 81 14 16 15 06 14 F5 C1 01 0E 94 46 22 82 0D 93 1D 9C 01 22 19 33 09 48 89 59 89 24 17 35 07 00 -2659 1739748928387 pro JtagIce3 [0x11] <<< 06 00 00 04 00 -2659 1739748928388 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928388 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928393 pro JtagIce3 [0x11] >>> 14 00 4C F0 FC 01 20 81 EB 81 FC 81 E8 0F F9 1F 20 83 01 97 EF CF 4B 81 5C 81 60 E3 70 E0 88 89 99 89 82 0D 93 1D 0E 94 1B 23 1B 8A 1A 8A C1 01 0E 94 46 22 09 85 1A 85 2A 89 3B 89 AC 01 B1 01 8F 8D 98 A1 0E 94 D4 1B A6 96 E2 E1 0C 94 EC 1F 59 85 53 FF C4 CC 80 E2 B5 CC 89 81 9A 81 8C 3F 9F 4F 54 F0 E9 81 FA 81 2D 81 3E 81 E2 17 F3 07 0C F4 AF CD 35 E6 04 C0 F5 E6 FF 87 CF CD 36 E6 3F 87 00 -2659 1739748928393 pro JtagIce3 [0x11] <<< 06 00 00 04 40 -2659 1739748928394 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928394 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928400 pro JtagIce3 [0x11] >>> 14 00 CC CD A0 E2 B0 E0 E7 E4 F4 E0 0C 94 D0 1F 99 8F 88 8F FB 01 29 83 20 81 2F 83 31 81 3A 8F 82 81 93 81 99 8B 88 8B 24 81 35 81 3D 87 2C 87 80 85 91 85 9C 8F 8B 8F 66 80 77 80 FA 01 C0 80 D1 80 E2 80 F3 80 20 E0 30 E0 A9 01 C7 01 B6 01 0E 94 EE 23 87 FF 06 C0 F7 FA F0 94 F7 F8 F0 94 8D E2 04 C0 5F 81 52 FF E1 C2 8B E2 F3 01 80 83 2C 85 3D 85 21 50 31 09 3F 87 2E 87 41 E0 50 E0 5E 83 00 -2659 1739748928400 pro JtagIce3 [0x11] <<< 06 00 00 04 80 -2659 1739748928401 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928401 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928406 pro JtagIce3 [0x11] >>> 14 00 4D 83 06 C0 8C 85 9D 85 9F 87 8E 87 1E 82 1D 82 B7 01 A6 01 7F 77 E9 81 0E 2E 00 0C FF 0B FB 87 EA 87 41 15 51 05 F0 E8 6F 07 FF E7 7F 07 A9 F4 2A 85 3B 85 21 54 31 09 8D 81 9E 81 86 0D 97 1D 2A 31 31 05 18 F4 6C E1 76 E0 02 C0 60 E2 76 E0 0E 94 4D 23 80 E2 96 E0 98 C2 8D 81 9E 81 86 0D 97 1D 41 30 51 05 60 48 7F 47 88 F0 2A 85 3B 85 21 54 31 09 2A 31 31 05 18 F4 64 E2 76 E0 02 C0 00 -2659 1739748928406 pro JtagIce3 [0x11] <<< 06 00 00 04 C0 -2659 1739748928407 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928407 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928413 pro JtagIce3 [0x11] >>> 14 00 68 E2 76 E0 0E 94 4D 23 88 E2 96 E0 7E C2 20 E3 FC 01 20 83 ED 81 FE 81 31 96 E6 0D F7 1D 2D 81 3E 81 2E 5F 3F 4F 3E 83 2D 83 4A 85 5B 85 41 54 51 09 5F 8B 4E 8B 4A 31 51 05 10 F0 88 E7 01 C0 88 E5 80 83 20 E0 30 E0 A9 01 C7 01 B6 01 0E 94 EE 23 1C 82 1B 82 1F 8E 19 82 88 23 09 F4 69 C0 50 E8 58 A3 8F E3 8A 83 2F 8D 39 81 48 A1 5A 81 6F 8D 79 81 88 A1 9A 81 0E 94 A4 23 5B 01 8C 01 00 -2659 1739748928413 pro JtagIce3 [0x11] <<< 06 00 00 05 00 -2659 1739748928414 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928414 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928419 pro JtagIce3 [0x11] >>> 14 00 A7 01 96 01 0E 94 F3 23 18 16 0C F4 47 C0 EB 81 FC 81 31 96 FC 83 EB 83 AF 8E B9 82 08 A3 1A 83 E3 CF 20 E0 30 E0 40 E0 5F E3 6F 8D 79 81 88 A1 9A 81 0E 94 0C 24 20 E0 30 E0 A9 01 0E 94 EE 23 81 11 18 C0 20 E0 30 E0 40 E8 5A E5 6F 8D 79 81 88 A1 9A 81 0E 94 0C 24 6F 8F 79 83 88 A3 9A 83 20 E0 30 E0 40 E8 5A E5 C7 01 B6 01 0E 94 0C 24 6B 01 7C 01 20 E0 30 E0 40 E0 5F E3 6F 8D 79 81 00 -2659 1739748928419 pro JtagIce3 [0x11] <<< 06 00 00 05 40 -2659 1739748928420 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928420 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928426 pro JtagIce3 [0x11] >>> 14 00 88 A1 9A 81 0E 94 0C 24 6F 8F 79 83 88 A3 9A 83 2B 81 3C 81 21 50 31 09 3C 83 2B 83 2F 8D 39 81 48 A1 5A 81 C7 01 B6 01 0E 94 EE 23 87 FD B9 CF 04 C0 30 E8 38 A3 4F E3 4A 83 88 89 99 89 97 FF 02 C0 88 E1 90 E0 FC 01 31 96 F9 87 E8 87 8F 8C 99 80 A8 A0 BA 80 16 01 87 01 41 2C 51 2C 94 01 A5 01 B1 01 C8 01 0E 94 08 24 0E 94 72 14 6A 8B 7B 8B 8C 8B 9D 8B 94 01 A5 01 0E 94 0C 24 9B 01 00 -2659 1739748928426 pro JtagIce3 [0x11] <<< 06 00 00 05 80 -2659 1739748928427 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928427 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928432 pro JtagIce3 [0x11] >>> 14 00 AC 01 B1 01 C8 01 0E 94 A3 23 1B 01 8C 01 20 E0 30 E0 40 E8 5D E3 B4 01 C5 01 0E 94 0C 24 4B 01 5C 01 FF EF 4F 1A 5F 0A 28 89 39 89 37 FF 09 C0 20 E0 30 E0 A9 01 B1 01 C8 01 0E 94 EE 23 88 23 31 F0 48 85 59 85 44 16 55 06 4C F2 02 C0 59 86 48 86 20 E0 30 E0 40 E0 51 E4 B4 01 C5 01 0E 94 0C 24 4B 01 5C 01 9B 01 AC 01 B1 01 C8 01 0E 94 EE 23 87 FD 12 C0 A5 01 94 01 B1 01 C8 01 0E 94 00 -2659 1739748928432 pro JtagIce3 [0x11] <<< 06 00 00 05 C0 -2659 1739748928433 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928433 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928439 pro JtagIce3 [0x11] >>> 14 00 EE 23 81 11 0D C0 6A 89 7B 89 8C 89 9D 89 0E 94 AA 23 61 70 77 27 67 2B 19 F4 81 2C 91 2C 54 01 A5 01 94 01 C7 01 B6 01 0E 94 A4 23 6B 01 7C 01 DC 01 CB 01 BF 77 00 97 A0 48 BF 47 09 F4 B8 CE 2E 84 3F 84 82 E0 28 1A 31 08 E8 85 F9 85 F1 95 E1 95 F1 09 FB 8B EA 8B 0D 81 1E 81 41 2C 51 2C 1F 86 1E 86 19 86 18 86 2B 8D 3C 8D 25 50 31 09 3E 8F 2D 8F 1B 87 0A 87 ED 8D FE 8D 0E 17 1F 07 00 -2659 1739748928439 pro JtagIce3 [0x11] <<< 06 00 00 06 00 -2659 1739748928440 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928440 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928445 pro JtagIce3 [0x11] >>> 14 00 08 F0 93 C0 2F 8D 39 81 48 A1 5A 81 C7 01 B6 01 0E 94 08 24 0E 94 72 14 4B 01 5C 01 0E 94 AA 23 AB 01 61 15 71 05 41 F4 E8 85 F9 85 EF 2B 21 F0 FF EF 4F 1A 5F 0A 4F C0 2E 85 3F 85 23 2B 99 F4 E8 85 F9 85 EF 2B 79 F0 0F 5F 1F 4F EA 85 FB 85 E6 0D F7 1D 2E E2 20 83 31 E0 23 1A 31 08 E1 E0 F0 E0 FF 87 EE 87 F3 01 E0 0F F1 1F 92 01 21 15 31 05 29 F0 A0 E3 A1 93 21 50 31 09 F8 CF F8 01 00 -2659 1739748928445 pro JtagIce3 [0x11] <<< 06 00 00 06 40 -2659 1739748928446 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928446 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928452 pro JtagIce3 [0x11] >>> 14 00 E4 0D F5 1D FB 87 EA 87 24 18 35 08 4A 30 51 05 1C F4 60 5D 7F 4F 02 C0 69 5A 7F 4F 2E 89 3F 89 2A 31 31 05 50 F4 CB 01 80 62 81 56 91 09 4A 97 20 F4 CB 01 0E 94 24 23 BC 01 0A 85 1B 85 0F 5F 1F 4F EA 85 FB 85 E6 0D F7 1D 60 83 31 E0 23 1A 31 08 41 2C 51 2C 2F 8D 39 81 48 A1 5A 81 C5 01 B4 01 0E 94 0C 24 9B 01 AC 01 C7 01 B6 01 0E 94 A3 23 6B 01 7C 01 20 E0 30 E0 40 E8 5D E3 6F 8D 00 -2659 1739748928452 pro JtagIce3 [0x11] <<< 06 00 00 06 80 -2659 1739748928453 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928453 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928458 pro JtagIce3 [0x11] >>> 14 00 79 81 88 A1 9A 81 0E 94 0C 24 6F 8F 79 83 88 A3 9A 83 48 85 59 85 41 50 51 09 59 87 48 87 8A 89 9B 89 84 17 95 07 09 F0 65 CF 2E 85 3F 85 23 2B 49 F5 F3 01 E0 0F F1 1F 41 14 51 04 E1 F0 48 89 59 89 14 16 15 06 BC F4 5F 81 50 FD 14 C0 8E E2 80 83 F8 01 31 96 E6 0D F7 1D C2 01 20 E3 21 93 01 97 E9 F7 04 0D 15 1D 0F 5F 1F 4F 40 94 50 94 24 0C 35 1C 07 C0 8F 81 84 FF 04 C0 8E E2 80 83 00 -2659 1739748928458 pro JtagIce3 [0x11] <<< 06 00 00 06 C0 -2659 1739748928459 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928459 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928465 pro JtagIce3 [0x11] >>> 14 00 0F 5F 1F 4F F3 01 E0 0F F1 1F F9 87 E8 87 10 82 EB 8D FC 8D 31 97 E6 0D F7 1D 10 82 2B 81 3C 81 37 FF 09 C0 31 95 21 95 31 09 3C 83 2B 83 EE 24 E3 94 F1 2C 02 C0 E1 2C F1 2C 21 E0 30 E0 8A E0 C8 2E D1 2C CF 01 86 19 97 09 4B 81 5C 81 45 2B 79 F0 8B 81 9C 81 B6 01 0E 94 30 21 80 5D 82 93 6B 83 7C 83 21 50 31 09 41 E0 24 1A 31 08 EA CF 21 30 31 05 71 F3 FC 01 31 97 E6 0D F7 1D E1 14 00 -2659 1739748928465 pro JtagIce3 [0x11] <<< 06 00 00 07 00 -2659 1739748928466 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928466 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928471 pro JtagIce3 [0x11] >>> 14 00 F1 04 11 F4 2B E2 01 C0 2D E2 20 83 02 97 B3 01 68 0F 79 1F EE 89 FF 89 7A 97 10 F0 20 E7 01 C0 20 E5 FB 01 20 83 08 17 19 07 24 F4 88 85 99 85 0E 94 4D 23 FF 81 F1 FF 27 C0 F0 FD 25 C0 22 E0 22 1A 31 08 12 14 13 04 FC F4 C3 01 0E 94 46 22 86 0D 97 1D 9C 01 26 19 37 09 4D 81 5E 81 24 17 35 07 3C F0 FC 01 20 81 E2 0D F3 1D 20 83 01 97 F1 CF A1 01 60 E3 70 E0 8D 81 9E 81 86 0D 97 1D 00 -2659 1739748928471 pro JtagIce3 [0x11] <<< 06 00 00 07 40 -2659 1739748928472 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928472 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928478 pro JtagIce3 [0x11] >>> 14 00 0E 94 1B 23 1D 86 1C 86 C3 01 0E 94 46 22 0F 81 1A 8D 2C 85 3D 85 AC 01 B3 01 88 8D 99 8D 0E 94 D4 1B A0 96 E2 E1 0C 94 EC 1F 5F 81 53 FF 2A CD 80 E2 1B CD CF 93 DF 93 CD B7 DE B7 CA 50 D1 40 0F B6 F8 94 DE BF 0F BE CD BF 80 E0 0E 94 6B 23 2F E7 38 E3 81 E0 21 50 30 40 80 40 E1 F7 00 C0 00 00 81 E0 0E 94 6B 23 9F E7 28 E3 31 E0 91 50 20 40 30 40 E1 F7 00 C0 00 00 0E 94 1A 24 0E 94 00 -2659 1739748928478 pro JtagIce3 [0x11] <<< 06 00 00 07 80 -2659 1739748928479 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928479 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928484 pro JtagIce3 [0x11] >>> 14 00 89 22 88 E1 91 E0 0E 94 E1 21 0E 94 17 24 8F E7 98 E3 21 E0 81 50 90 40 20 40 E1 F7 00 C0 00 00 0E 94 F7 22 3F E7 88 E3 91 E0 31 50 80 40 90 40 E1 F7 00 C0 00 00 0E 94 45 23 2F E7 38 E3 81 E0 21 50 30 40 80 40 E1 F7 00 C0 00 00 0E 94 DB 22 9F E7 28 E3 31 E0 91 50 20 40 30 40 E1 F7 00 C0 00 00 0E 94 6F 22 0E 94 95 22 0E 94 A1 22 8C E2 91 E0 0E 94 E1 21 0E 94 00 24 0E 94 7C 22 0E 94 00 -2659 1739748928484 pro JtagIce3 [0x11] <<< 06 00 00 07 C0 -2659 1739748928485 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928485 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928491 pro JtagIce3 [0x11] >>> 14 00 C6 23 0E 94 CC 23 0E 94 04 24 0E 94 00 24 83 E4 91 E0 0E 94 E1 21 8F E1 9E E4 01 97 F1 F7 00 C0 00 00 0E 94 E5 14 8A E5 91 E0 0E 94 E1 21 80 E0 0E 94 00 23 8D E6 91 E0 0E 94 E1 21 0F 2E F5 EB CF 2E F5 E0 DF 2E F0 2D 03 ED 15 E0 F6 01 11 92 11 92 E0 17 F1 07 D9 F7 10 92 6E 06 CE 01 08 96 0E 94 BC 12 83 E0 91 E0 FE 01 38 96 AF E4 B2 E0 01 90 0D 92 01 97 E1 F7 83 E9 91 E0 0E 94 E1 21 00 -2659 1739748928491 pro JtagIce3 [0x11] <<< 06 00 00 08 00 -2659 1739748928492 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928492 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928497 pro JtagIce3 [0x11] >>> 14 00 2D B7 3E B7 23 50 31 40 0F B6 F8 94 3E BF 0F BE 2D BF AD B7 BE B7 11 96 83 E0 91 E0 EF E4 F2 E0 01 90 0D 92 01 97 E1 F7 0E 94 13 12 80 93 6D 06 0F B6 F8 94 DE BF 0F BE CD BF 81 30 F9 F4 0F 2E F5 E0 EF 2E F1 2C F0 2D 81 E0 0E 94 64 23 3F E7 82 E3 92 E0 31 50 80 40 90 40 E1 F7 00 C0 00 00 80 E0 0E 94 64 23 8F E1 9E E4 01 97 F1 F7 00 C0 00 00 91 E0 E9 1A F1 08 39 F7 1E C0 0F 2E F5 E0 00 -2659 1739748928497 pro JtagIce3 [0x11] <<< 06 00 00 08 40 -2659 1739748928498 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928498 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928504 pro JtagIce3 [0x11] >>> 14 00 EF 2E F1 2C F0 2D 81 E0 0E 94 64 23 8F E1 9E E4 01 97 F1 F7 00 C0 00 00 80 E0 0E 94 64 23 9F E7 22 E3 32 E0 91 50 20 40 30 40 E1 F7 00 C0 00 00 81 E0 E8 1A F1 08 39 F7 80 91 6D 06 82 30 29 F4 8E EA 91 E0 0E 94 E1 21 04 C0 83 EC 91 E0 0E 94 E1 21 10 92 6E 06 0E 94 C8 20 0F 2E F5 EB EF 2E F5 E0 FF 2E F0 2D 0F 2E F2 E2 AF 2E F0 2D 0F 2E F3 E2 BF 2E F0 2D 80 E0 0E 94 79 23 80 E0 0E 94 00 -2659 1739748928504 pro JtagIce3 [0x11] <<< 06 00 00 08 80 -2659 1739748928505 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928505 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928510 pro JtagIce3 [0x11] >>> 14 00 72 23 0E 94 8D 1E F8 94 80 91 6F 06 88 23 71 F0 E0 91 6E 06 F0 E0 EE 0F FF 1F EB 54 FA 4F 80 81 91 81 01 96 91 83 80 83 10 92 6F 06 80 91 71 06 81 11 04 C0 80 91 70 06 88 23 E9 F2 89 ED 91 E0 0E 94 E1 21 10 92 71 06 80 91 6E 06 8F 5F 80 93 6E 06 10 92 72 06 0E 94 04 24 0E 94 00 24 0E 94 04 24 0E 94 00 24 80 91 70 06 81 11 05 C0 80 91 6E 06 8F 30 08 F4 BF CF 10 92 6E 06 81 E0 0E 94 00 -2659 1739748928510 pro JtagIce3 [0x11] <<< 06 00 00 08 C0 -2659 1739748928511 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928511 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928517 pro JtagIce3 [0x11] >>> 14 00 6B 23 0E 94 E5 14 81 E0 0E 94 87 23 80 E0 0E 94 80 23 8F EC 97 E0 01 97 F1 F7 00 C0 00 00 CE 01 08 96 0E 94 BC 12 83 E0 91 E0 FE 01 38 96 AF E4 B2 E0 01 90 0D 92 01 97 E1 F7 80 91 6D 06 82 30 E9 F4 2D B7 3E B7 23 50 31 40 0F B6 F8 94 3E BF 0F BE 2D BF AD B7 BE B7 11 96 83 E0 91 E0 EF E4 F2 E0 01 90 0D 92 01 97 E1 F7 0E 94 13 12 80 93 6D 06 0F B6 F8 94 DE BF 0F BE CD BF 84 E7 95 E0 00 -2659 1739748928517 pro JtagIce3 [0x11] <<< 06 00 00 09 00 -2659 1739748928518 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928518 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928523 pro JtagIce3 [0x11] >>> 14 00 0E 94 A1 21 0E 94 C8 20 0E 94 C8 20 98 2E 89 2E 0E 94 E4 13 29 83 3A 83 4B 83 5C 83 6D 83 7E 83 8F 83 FF 92 EF 92 8F 92 9F 92 2D B7 3E B7 27 50 31 09 0F B6 F8 94 3E BF 0F BE 2D BF AD B7 BE B7 11 96 87 E0 FE 01 31 96 01 90 0D 92 8A 95 E1 F7 8D B7 9E B7 83 50 91 40 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 83 E0 91 E0 EF E4 F2 E0 01 90 0D 92 01 97 E1 F7 CE 01 08 96 0E 94 B8 10 00 -2659 1739748928523 pro JtagIce3 [0x11] <<< 06 00 00 09 40 -2659 1739748928524 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928524 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928530 pro JtagIce3 [0x11] >>> 14 00 81 E4 FE 01 38 96 A4 E7 B5 E0 01 90 0D 92 8A 95 E1 F7 0F B6 F8 94 DE BF 0F BE CD BF 8A EE 91 E0 0E 94 E1 21 8D B7 9E B7 81 54 91 09 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 81 E4 E4 E7 F5 E0 01 90 0D 92 8A 95 E1 F7 0E 94 0D 1C 80 91 70 06 0F B6 F8 94 DE BF 0F BE CD BF 88 23 21 F0 B0 92 78 05 10 92 70 06 8D B7 9E B7 81 54 91 09 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 00 -2659 1739748928530 pro JtagIce3 [0x11] <<< 06 00 00 09 80 -2659 1739748928531 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928531 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928536 pro JtagIce3 [0x11] >>> 14 00 81 E4 E4 E7 F5 E0 01 90 0D 92 8A 95 E1 F7 0E 94 7B 0D 98 2E 0F B6 F8 94 DE BF 0F BE CD BF 32 E0 83 13 A3 C0 88 EF 91 E0 0E 94 E1 21 8D B7 9E B7 81 54 91 09 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 81 E4 E4 E7 F5 E0 01 90 0D 92 8A 95 E1 F7 0E 94 D6 1C 0F B6 F8 94 DE BF 0F BE CD BF 84 C0 11 92 11 92 E0 17 F1 07 D9 F7 31 E0 93 12 C2 CE 0E 94 1C 22 88 23 09 F4 BD CE 84 E7 95 E0 00 -2659 1739748928536 pro JtagIce3 [0x11] <<< 06 00 00 09 C0 -2659 1739748928537 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928537 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928543 pro JtagIce3 [0x11] >>> 14 00 0E 94 A1 21 CE 01 08 96 0E 94 62 22 81 E4 FE 01 38 96 A4 E7 B5 E0 01 90 0D 92 8A 95 E1 F7 A0 92 78 05 8F E7 9A E1 26 E0 81 50 90 40 20 40 E1 F7 00 C0 00 00 8D B7 9E B7 81 54 91 09 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 81 E4 E4 E7 F5 E0 01 90 0D 92 8A 95 E1 F7 0E 94 7B 0D 0F B6 F8 94 DE BF 0F BE CD BF 82 30 21 F4 81 E2 92 E0 0E 94 E1 21 8D B7 9E B7 81 54 91 09 0F B6 F8 94 00 -2659 1739748928543 pro JtagIce3 [0x11] <<< 06 00 00 0A 00 -2659 1739748928544 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928544 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928549 pro JtagIce3 [0x11] >>> 14 00 9E BF 0F BE 8D BF AD B7 BE B7 11 96 81 E4 E4 E7 F5 E0 01 90 0D 92 8A 95 E1 F7 0E 94 7B 0D 0F B6 F8 94 DE BF 0F BE CD BF 0E 94 C1 21 86 E3 92 E0 0E 94 E1 21 8D B7 9E B7 81 54 91 09 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 81 E4 E4 E7 F5 E0 01 90 0D 92 8A 95 E1 F7 0E 94 0D 1C 0F B6 F8 94 DE BF 0F BE CD BF 46 CE F6 01 7A CF A2 E1 B0 E0 ED E3 FA E0 0C 94 D3 1F 4C 01 6B 01 1A 82 00 -2659 1739748928549 pro JtagIce3 [0x11] <<< 06 00 00 0A 40 -2659 1739748928550 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928550 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928556 pro JtagIce3 [0x11] >>> 14 00 19 82 8F EF 9F EF 9C 83 8B 83 1E 82 1D 82 58 87 4F 83 3A 87 29 87 A1 2C B1 2C D6 01 6D 90 7C 90 F3 01 EA 0D FB 1D 80 81 81 11 0F C0 D6 01 ED 93 FC 93 80 81 85 32 09 F0 D9 C1 3F 01 BF EF 6B 1A 7B 0A F6 01 71 82 60 82 19 C0 85 32 79 F3 B4 01 08 2E 00 0C 99 0B 0E 94 B4 19 4F EF A4 1A B4 0A DC CF 8C 32 AC F0 8D 32 F9 F4 89 81 9A 81 81 60 9A 83 89 83 31 96 D6 01 ED 93 FC 93 D6 01 ED 91 00 -2659 1739748928556 pro JtagIce3 [0x11] <<< 06 00 00 0A 80 -2659 1739748928557 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928557 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928562 pro JtagIce3 [0x11] >>> 14 00 FC 91 80 81 8B 32 69 F7 89 81 9A 81 84 60 F0 CF 80 32 21 F4 89 81 9A 81 88 60 EA CF 83 32 51 F4 89 81 9A 81 80 61 E4 CF 80 33 21 F4 89 81 9A 81 82 60 DE CF B7 01 C6 01 0E 94 BE 1D 9E 83 8D 83 97 FF 0B C0 29 81 3A 81 B1 E0 2B 27 3A 83 29 83 91 95 81 95 91 09 9E 83 8D 83 89 81 9A 81 80 FF 03 C0 8D 7F 9A 83 89 83 D6 01 ED 91 FC 91 11 97 80 81 8E 32 49 F4 31 96 ED 93 FC 93 B7 01 C6 01 00 -2659 1739748928562 pro JtagIce3 [0x11] <<< 06 00 00 0A C0 -2659 1739748928563 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928563 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928569 pro JtagIce3 [0x11] >>> 14 00 0E 94 BE 1D 9C 83 8B 83 C6 01 0E 94 39 1F 58 2E D6 01 ED 91 FC 91 80 81 08 2E 00 0C 99 0B 0E 94 55 23 89 36 09 F4 43 C0 84 F4 83 36 09 F4 08 C1 34 F4 85 32 09 F4 2D C1 81 36 E1 F0 36 C1 84 36 B1 F1 88 36 0C F4 DF C0 30 C1 80 37 09 F4 9A C0 3C F4 8E 36 09 F4 C2 C0 8F 36 09 F4 61 C0 25 C1 85 37 09 F4 40 C0 88 37 09 F4 76 C0 83 37 09 F0 1C C1 F9 C0 65 2D 70 E0 A7 01 CE 01 0B 96 0E 94 00 -2659 1739748928569 pro JtagIce3 [0x11] <<< 06 00 00 0B 00 -2659 1739748928570 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928570 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928575 pro JtagIce3 [0x11] >>> 14 00 59 1F 89 2B 09 F4 2C C1 D6 01 ED 91 FC 91 11 97 CF 01 01 96 8D 93 9C 93 20 81 AE 01 45 5F 5F 4F BE 01 6F 5F 7F 4F C4 01 0E 94 41 04 16 C1 65 2D 70 E0 97 01 41 E0 50 E0 CE 01 0B 96 0E 94 FF 0F 89 2B 09 F4 0D C1 F6 01 80 81 91 81 01 96 91 83 80 83 AE 01 45 5F 5F 4F BE 01 6F 5F 7F 4F C4 01 0E 94 40 0F FA C0 65 2D 70 E0 97 01 40 E0 50 E0 CE 01 0B 96 0E 94 FF 0F 89 2B 09 F4 F1 C0 D6 01 00 -2659 1739748928575 pro JtagIce3 [0x11] <<< 06 00 00 0B 40 -2659 1739748928576 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928576 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928582 pro JtagIce3 [0x11] >>> 14 00 8D 91 9C 91 11 97 01 96 8D 93 9C 93 AE 01 45 5F 5F 4F BE 01 6F 5F 7F 4F C4 01 0E 94 CB 17 DD C0 65 2D 70 E0 97 01 40 E0 50 E0 CE 01 0B 96 0E 94 FF 0F 89 2B 09 F4 D4 C0 F6 01 80 81 91 81 01 96 91 83 80 83 AE 01 45 5F 5F 4F BE 01 6F 5F 7F 4F C4 01 0E 94 9A 16 C1 C0 65 2D 70 E0 97 01 40 E0 50 E0 CE 01 0B 96 0E 94 FF 0F 89 2B 09 F4 B8 C0 D6 01 ED 91 FC 91 11 97 CF 01 01 96 8D 93 9C 93 00 -2659 1739748928582 pro JtagIce3 [0x11] <<< 06 00 00 0B 80 -2659 1739748928583 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928583 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928588 pro JtagIce3 [0x11] >>> 14 00 20 81 22 C0 D7 01 ED 91 FC 91 11 97 CF 01 02 96 8D 93 9C 93 00 81 11 81 0B 87 1C 87 1D 86 1E 86 1F 86 18 8A 19 8A 1A 8A F6 01 80 81 91 81 01 96 91 83 80 83 8B 85 9C 85 89 2B 29 F4 20 E0 30 E0 41 E5 56 E0 84 C0 28 E7 AE 01 45 5F 5F 4F BE 01 6F 5F 7F 4F C4 01 0E 94 3B 0C 7F C0 A5 01 40 0F 51 1F 65 2D 70 E0 97 01 CE 01 0B 96 0E 94 C4 15 89 2B 09 F4 75 C0 D6 01 8D 91 9C 91 11 97 01 96 00 -2659 1739748928588 pro JtagIce3 [0x11] <<< 06 00 00 0B C0 -2659 1739748928589 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928589 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928595 pro JtagIce3 [0x11] >>> 14 00 8D 93 9C 93 73 C0 65 2D 70 E0 A7 01 CE 01 0B 96 0E 94 59 1F 89 2B 09 F4 63 C0 D6 01 ED 91 FC 91 11 97 CF 01 01 96 8D 93 9C 93 20 81 AE 01 45 5F 5F 4F BE 01 6F 5F 7F 4F C4 01 0E 94 AB 00 4D C0 B0 E8 5B 12 4D C0 F6 01 80 81 91 81 01 96 91 83 80 83 D7 01 ED 91 FC 91 11 97 CF 01 02 96 8D 93 9C 93 80 81 20 C0 B0 E8 5B 12 3A C0 F6 01 80 81 91 81 01 96 91 83 80 83 D7 01 ED 91 FC 91 11 97 00 -2659 1739748928595 pro JtagIce3 [0x11] <<< 06 00 00 0C 00 -2659 1739748928596 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928596 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928601 pro JtagIce3 [0x11] >>> 14 00 CF 01 02 96 8D 93 9C 93 40 81 51 81 20 E0 30 E0 1E C0 B0 E8 5B 12 24 C0 F6 01 20 81 31 81 2F 5F 3F 4F 31 83 20 83 8B 87 0D C0 85 E2 8B 87 D6 01 6D 92 7C 92 1A 82 19 82 1E 82 1D 82 8F EF 9F EF 9C 83 8B 83 21 E0 30 E0 AE 01 45 5F 5F 4F BE 01 6F 5F 7F 4F C4 01 0E 94 18 1E 8A 0D 9B 1D 07 C0 F6 01 80 81 91 81 01 96 91 83 80 83 C5 01 62 96 EF E0 0C 94 EF 1F A4 E1 B0 E0 E1 E4 FC E0 0C 94 00 -2659 1739748928601 pro JtagIce3 [0x11] <<< 06 00 00 0C 40 -2659 1739748928602 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928602 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928608 pro JtagIce3 [0x11] >>> 14 00 D0 1F 98 87 8F 83 7A 83 69 83 5C 8B 4B 8B 12 2F DB 01 12 96 ED 91 FC 91 13 97 14 96 2D 91 3C 91 15 97 3E 83 2D 83 CD 90 DC 90 11 97 16 96 2D 90 3C 90 17 97 F7 FD 03 C0 E8 94 C1 F8 02 C0 E1 E0 F0 E0 C6 01 80 71 99 27 9A 87 89 87 C4 FE 1F C0 AB 89 BC 89 2C 91 11 96 3C 91 11 97 12 96 4C 91 12 97 13 96 5C 91 13 97 14 96 6C 91 14 97 15 96 7C 91 15 97 16 96 8C 91 16 97 17 96 9C 91 A0 E0 00 -2659 1739748928608 pro JtagIce3 [0x11] <<< 06 00 00 0C 80 -2659 1739748928609 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928609 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928614 pro JtagIce3 [0x11] >>> 14 00 0E 94 B9 22 21 F0 8D 81 9E 81 02 97 02 C0 8D 81 9E 81 96 01 28 70 33 27 3C 87 2B 87 C3 FC 01 97 AB 89 BC 89 4C 90 11 96 5C 90 11 97 12 96 6C 90 12 97 13 96 7C 90 13 97 14 96 8C 90 14 97 15 96 9C 90 15 97 16 96 AC 90 16 97 17 96 BC 90 A9 81 BA 81 18 96 ED 90 FC 90 19 97 B1 E0 EB 1A F1 08 D1 01 AE 0D BF 1D 1C 92 9C 83 8B 83 9F 01 28 1B 39 0B 3E 87 2D 87 C6 01 82 70 99 27 98 8B 8F 87 00 -2659 1739748928614 pro JtagIce3 [0x11] <<< 06 00 00 0C C0 -2659 1739748928615 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928615 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928621 pro JtagIce3 [0x11] >>> 14 00 81 2F 01 2E 00 0C 99 0B DC 01 A1 54 B1 09 BA 8B A9 8B 32 E0 E3 16 F1 04 30 F4 89 85 9A 85 89 2B 09 F0 4C C0 73 C0 92 01 A3 01 B4 01 C5 01 A0 E0 0E 94 B9 22 81 F1 B1 E0 EB 1A F1 08 C2 01 8F 70 99 27 8A 30 91 05 14 F4 C0 96 02 C0 89 5A 9F 4F E9 89 FA 89 7A 97 48 F4 9C 01 20 62 21 56 31 09 2A 31 31 05 10 F4 0E 94 24 23 F1 01 EE 0D FF 1D 80 83 2B 81 3C 81 21 50 31 09 3C 83 2B 83 92 01 00 -2659 1739748928621 pro JtagIce3 [0x11] <<< 06 00 00 0D 00 -2659 1739748928622 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928622 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928627 pro JtagIce3 [0x11] >>> 14 00 A3 01 B4 01 C5 01 04 E0 0E 94 7B 1F 29 01 3A 01 4B 01 5C 01 BE CF 8D 85 9E 85 AB 81 BC 81 8A 0F 9B 1F 18 16 19 06 3C F2 1A 16 1B 06 0C F0 B5 CF EF 85 F8 89 EF 2B 09 F0 BE CF AF CF AB 89 BC 89 2C 91 11 96 3C 91 11 97 12 96 4C 91 12 97 13 96 5C 91 13 97 14 96 6C 91 14 97 15 96 7C 91 15 97 16 96 8C 91 16 97 17 96 9C 91 A0 E0 0E 94 B9 22 69 F0 F1 01 EE 0D FF 1D 31 97 10 83 B2 E0 EB 1A 00 -2659 1739748928627 pro JtagIce3 [0x11] <<< 06 00 00 0D 40 -2659 1739748928628 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928628 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928634 pro JtagIce3 [0x11] >>> 14 00 F1 08 F1 01 EE 0D FF 1D 80 E3 80 83 EB 85 FC 85 EF 2B 41 F0 F1 E0 EF 1A F1 08 F1 01 EE 0D FF 1D 80 E2 80 83 A9 81 BA 81 18 96 4D 91 5C 91 19 97 41 50 51 09 4E 19 5F 09 B1 01 6E 0D 7F 1D 86 01 2D 81 3E 81 8F 81 98 85 0E 94 D4 1B 9C 01 EF 81 F8 85 80 81 91 81 90 FF 09 C0 A9 81 BA 81 12 96 8D 91 9C 91 13 97 82 17 93 07 0C F4 C9 01 64 96 E2 E1 0C 94 EC 1F EF 92 FF 92 0F 93 1F 93 CF 93 00 -2659 1739748928634 pro JtagIce3 [0x11] <<< 06 00 00 0D 80 -2659 1739748928635 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928635 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928640 pro JtagIce3 [0x11] >>> 14 00 DF 93 CD B7 DE B7 C1 54 D1 09 0F B6 F8 94 DE BF 0F BE CD BF 4D B7 5E B7 41 54 51 09 0F B6 F8 94 5E BF 0F BE 4D BF AD B7 BE B7 11 96 81 E4 FE 01 E6 5B FF 4F 01 90 0D 92 8A 95 E1 F7 0E 94 C7 18 C8 57 DF 4F 88 81 C8 58 D0 40 80 93 67 06 C7 57 DF 4F 88 81 C9 58 D0 40 80 93 66 06 C6 57 DF 4F 88 81 CA 58 D0 40 80 93 65 06 0F B6 F8 94 DE BF 0F BE CD BF 1A E0 01 E0 FF 24 F3 94 E1 2C 82 E3 00 -2659 1739748928640 pro JtagIce3 [0x11] <<< 06 00 00 0D C0 -2659 1739748928641 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928641 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928647 pro JtagIce3 [0x11] >>> 14 00 90 E0 0E 94 19 1F 88 23 09 F4 73 C0 CE 01 01 96 0E 94 00 1A 81 E4 FE 01 31 96 A3 E3 B5 E0 01 90 0D 92 8A 95 E1 F7 8B E9 94 E0 0E 94 E1 21 4D B7 5E B7 41 54 51 09 0F B6 F8 94 5E BF 0F BE 4D BF AD B7 BE B7 11 96 81 E4 E3 E3 F5 E0 01 90 0D 92 8A 95 E1 F7 0E 94 0D 1C E3 E3 F5 E0 85 81 80 93 64 06 96 81 90 93 63 06 27 81 20 93 62 06 0F B6 F8 94 DE BF 0F BE CD BF 30 91 67 06 83 13 0B C0 00 -2659 1739748928647 pro JtagIce3 [0x11] <<< 06 00 00 0E 00 -2659 1739748928648 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928648 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928653 pro JtagIce3 [0x11] >>> 14 00 80 91 66 06 98 13 09 C0 8F 2D 90 91 65 06 92 17 29 F0 8E 2D 03 C0 80 E0 01 C0 80 E0 81 70 80 93 61 06 2D 96 2F AD 2D 97 90 91 34 05 29 13 35 C0 2C 96 2F AD 2C 97 90 91 35 05 29 13 2E C0 28 C0 80 91 3B 05 8F 3F 89 F4 84 EA 94 E0 0E 94 E1 21 81 E0 26 C0 81 32 49 F4 80 91 3B 05 81 11 05 C0 8C EB 94 E0 0E 94 E1 21 04 C0 83 ED 94 E0 0E 94 E1 21 11 50 09 F0 83 CF 82 E0 12 C0 00 93 5F 06 00 -2659 1739748928653 pro JtagIce3 [0x11] <<< 06 00 00 0E 40 -2659 1739748928654 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928654 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928660 pro JtagIce3 [0x11] >>> 14 00 80 91 37 05 80 32 31 F7 DB CF 10 92 5F 06 ED CF 00 93 60 06 88 23 C9 F3 F1 CF 10 92 60 06 F5 CF CF 5B DF 4F 0F B6 F8 94 DE BF 0F BE CD BF DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 08 95 6F 92 7F 92 8F 92 9F 92 AF 92 BF 92 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 CD B7 DE B7 8C 01 ED B6 FE B6 10 92 52 04 FB 01 80 81 83 30 69 F0 81 E0 80 93 52 04 81 E0 91 E0 E2 E5 F3 E0 D8 01 01 90 00 -2659 1739748928660 pro JtagIce3 [0x11] <<< 06 00 00 0E 80 -2659 1739748928661 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928661 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928666 pro JtagIce3 [0x11] >>> 14 00 0D 92 01 97 E1 F7 A7 C0 FB 01 81 81 8F 3F 69 F4 82 E0 80 93 52 04 81 E0 91 E0 E2 E5 F3 E0 D8 01 01 90 0D 92 01 97 E1 F7 96 C0 FB 01 92 81 83 81 94 80 F9 2F F8 70 8F 2E 93 FF 05 C0 FB 01 75 80 26 E0 30 E0 03 C0 71 2C 25 E0 30 E0 C8 2E D1 2C A6 01 4F 5F 5F 4F ED B7 FE B7 E4 1B F5 0B 0F B6 F8 94 FE BF 0F BE ED BF 4D B7 5E B7 4F 5F 5F 4F 5A 01 88 23 B1 F0 DB 01 A2 0F B3 1F FA 01 66 24 00 -2659 1739748928666 pro JtagIce3 [0x11] <<< 06 00 00 0E C0 -2659 1739748928667 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928667 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928673 pro JtagIce3 [0x11] >>> 14 00 6A 94 68 0E 46 2D 50 E0 4F 5F 5F 4F 4A 0D 5B 1D 8D 91 81 93 E4 17 F5 07 D9 F7 2F 5F 3F 4F 26 0D 31 1D F5 01 EC 0D FD 1D 10 82 F5 01 80 81 84 35 69 F0 8B E0 80 93 52 04 81 E0 91 E0 E2 E5 F3 E0 D8 01 01 90 0D 92 01 97 E1 F7 45 C0 97 70 91 30 69 F0 8C E0 80 93 52 04 81 E0 91 E0 E2 E5 F3 E0 D8 01 01 90 0D 92 01 97 E1 F7 35 C0 88 20 21 F0 77 20 11 F0 27 0D 31 1D FB 01 E2 0F F3 1F 80 81 00 -2659 1739748928673 pro JtagIce3 [0x11] <<< 06 00 00 0F 00 -2659 1739748928674 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928674 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928679 pro JtagIce3 [0x11] >>> 14 00 28 0F 31 1D F9 01 31 96 9A 94 98 1A 89 F0 E6 0F F7 1F A3 E5 B3 E0 2E 5F 3F 4F 8F EF 89 0D 28 0F 31 1D 62 0F 73 1F 81 91 8D 93 E6 17 F7 07 D9 F7 90 92 52 03 83 E5 93 E0 0E 94 E1 21 8B E5 96 E0 0E 94 E1 21 81 E0 91 E0 E2 E5 F3 E0 D8 01 01 90 0D 92 01 97 E1 F7 C8 01 0F B6 F8 94 FE BE 0F BE ED BE DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 DF 90 CF 90 BF 90 AF 90 9F 90 8F 90 7F 90 6F 90 08 95 00 -2659 1739748928679 pro JtagIce3 [0x11] <<< 06 00 00 0F 40 -2659 1739748928680 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928680 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928686 pro JtagIce3 [0x11] >>> 14 00 AD E0 B0 E0 E6 E4 FF E0 0C 94 D0 1F 9A 87 89 87 7C 83 6B 83 FA 01 DB 01 12 96 CD 90 DC 90 13 97 14 96 8D 91 9C 91 15 97 9E 83 8D 83 ED 90 FC 90 11 97 FA 82 E9 82 16 96 0D 90 BC 91 A0 2D B8 87 AF 83 20 80 31 80 42 80 53 80 64 80 75 80 86 80 97 80 81 01 B4 2D F5 2D E6 2D 7B 86 8C 86 9D 86 91 01 A2 01 B3 01 C4 01 A0 E0 0E 94 B9 22 4C F4 0E 94 D1 21 89 01 B4 2F F5 2F E6 2F 7B 87 8C 87 00 -2659 1739748928686 pro JtagIce3 [0x11] <<< 06 00 00 0F 80 -2659 1739748928687 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928687 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928692 pro JtagIce3 [0x11] >>> 14 00 9D 87 D7 FC 04 C0 E8 94 E1 F8 FA 82 E9 82 91 01 A2 01 B3 01 C4 01 A0 E0 ED 80 FE 80 0E 94 B9 22 1C F0 89 81 82 FF 04 C0 81 E0 E8 1A F1 08 05 C0 83 FF 03 C0 91 E0 E9 1A F1 08 CE 01 01 96 5C 01 8A E0 C8 2E D1 2C 2B 2F 3F 2F 4E 2F 5B 85 6C 85 7D 85 8B 81 9C 81 0E 94 67 11 FC 01 91 01 A2 01 B3 01 C4 01 A0 E0 0E 94 B9 22 1C F0 89 81 82 FF 12 C0 31 97 0F 81 18 85 0E 0F 1F 1F 91 01 A2 01 00 -2659 1739748928692 pro JtagIce3 [0x11] <<< 06 00 00 0F C0 -2659 1739748928693 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928693 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928699 pro JtagIce3 [0x11] >>> 14 00 B3 01 C4 01 A0 E0 0E 94 B9 22 14 F0 8B E2 01 C0 8D E2 D8 01 08 C0 83 FF 07 C0 31 97 AF 81 B8 85 AE 0F BF 1F 80 E2 8C 93 09 81 1A 81 AB 81 BC 81 18 96 4D 91 5C 91 19 97 41 50 51 09 4E 1B 5F 0B 6F 81 78 85 6E 0F 7F 1F 2D 81 3E 81 89 85 9A 85 0E 94 D4 1B 9C 01 E9 85 FA 85 80 81 91 81 90 FF 09 C0 AB 81 BC 81 12 96 8D 91 9C 91 13 97 82 17 93 07 0C F4 C9 01 2D 96 E2 E1 0C 94 EC 1F 0F 93 00 -2659 1739748928699 pro JtagIce3 [0x11] <<< 06 00 00 10 00 -2659 1739748928700 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928700 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928706 pro JtagIce3 [0x11] >>> 14 00 1F 93 CF 93 DF 93 FC 01 D9 01 68 38 71 05 31 F1 94 F4 61 38 71 05 B1 F1 2C F4 60 38 71 05 09 F4 78 C0 9F C0 62 38 71 05 09 F4 59 C0 64 38 71 05 09 F4 6F C0 96 C0 60 3A 71 05 09 F4 48 C0 2C F4 60 39 71 05 09 F4 4B C0 8C C0 60 3C 71 05 09 F4 76 C0 60 3F 71 05 09 F4 72 C0 83 C0 CD 91 DC 91 11 97 CE 01 02 96 8D 93 9C 93 45 2B 39 F0 98 81 89 2F 88 0F 88 0B 90 83 81 83 5B C0 88 81 80 83 00 -2659 1739748928706 pro JtagIce3 [0x11] <<< 06 00 00 10 40 -2659 1739748928707 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928707 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928712 pro JtagIce3 [0x11] >>> 14 00 11 82 68 C0 CD 91 DC 91 11 97 CE 01 04 96 8D 93 9C 93 45 2B 99 F0 88 81 99 81 AA 81 BB 81 AC 01 BD 01 77 0F 44 0B 54 2F BA 01 80 83 91 83 A2 83 B3 83 44 83 45 83 46 83 47 83 28 C0 08 81 19 81 2A 81 3B 81 00 83 11 83 22 83 33 83 45 C0 CD 91 DC 91 11 97 CE 01 02 96 8D 93 9C 93 23 C0 CD 91 DC 91 11 97 CE 01 08 96 8D 93 9C 93 78 81 69 81 5A 81 4B 81 3C 81 2D 81 9E 81 8F 81 70 83 61 83 00 -2659 1739748928712 pro JtagIce3 [0x11] <<< 06 00 00 10 80 -2659 1739748928713 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928713 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928719 pro JtagIce3 [0x11] >>> 14 00 52 83 43 83 34 83 25 83 96 83 87 83 81 E0 90 E0 2A C0 CD 91 DC 91 11 97 CE 01 02 96 8D 93 9C 93 45 2B A1 F0 99 81 28 81 89 2F 88 0F 88 0B 20 83 91 83 82 83 83 83 84 83 85 83 86 83 E6 CF CD 91 DC 91 11 97 CE 01 02 96 8D 93 9C 93 08 81 19 81 00 83 11 83 12 82 13 82 14 82 15 82 16 82 17 82 D5 CF 80 E0 90 E0 DF 91 CF 91 1F 91 0F 91 08 95 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 00 -2659 1739748928719 pro JtagIce3 [0x11] <<< 06 00 00 10 C0 -2659 1739748928720 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928720 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928725 pro JtagIce3 [0x11] >>> 14 00 CD B7 DE B7 8C 01 CB 5E DE 4F C8 80 C5 51 D1 40 CA 5E DE 4F D8 80 C6 51 D1 40 C9 5E DE 4F E8 80 C7 51 D1 40 C8 5E DE 4F F8 80 C8 51 D1 40 43 E7 54 E0 6F E0 70 E0 8E 2D 9F 2D 0E 94 19 24 84 E7 95 E0 0E 94 A1 21 4B 85 4B 30 10 F4 50 E0 02 C0 4A E0 50 E0 BE 01 64 5F 7F 4F 89 E7 95 E0 0E 94 D0 22 C4 5F DE 4F 48 81 CC 50 D1 40 4B 30 10 F4 50 E0 02 C0 4A E0 50 E0 BE 01 64 57 7F 4F 83 E8 00 -2659 1739748928725 pro JtagIce3 [0x11] <<< 06 00 00 11 00 -2659 1739748928726 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928726 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928732 pro JtagIce3 [0x11] >>> 14 00 95 E0 0E 94 D0 22 E4 E7 F5 E0 C1 8E D2 8E C1 5F DE 4F 88 81 CF 50 D1 40 83 8F C0 5F DE 4F 88 81 C0 51 D1 40 84 8F CE 5E DE 4F 88 81 C2 51 D1 40 85 8F CD 5E DE 4F 88 81 C3 51 D1 40 86 8F CC 5E DE 4F 88 81 C4 51 D1 40 87 8F AE 2D BF 2D E4 E9 F5 E0 22 EB 35 E0 8D 91 9C 91 11 97 80 83 8D 91 9D 91 91 83 32 96 E2 17 F3 07 A9 F7 69 E3 89 E7 95 E0 0E 94 6A 17 60 93 57 06 70 93 58 06 80 93 00 -2659 1739748928732 pro JtagIce3 [0x11] <<< 06 00 00 11 40 -2659 1739748928733 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928733 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928738 pro JtagIce3 [0x11] >>> 14 00 59 06 90 93 5A 06 E4 E7 F5 E0 66 AF 77 AF 80 93 B4 05 8C E3 80 83 8F E1 84 83 C3 5F DE 4F 88 81 CD 50 D1 40 82 83 8F EF 81 83 82 E0 83 83 81 E4 D8 01 01 90 0D 92 8A 95 E1 F7 C8 01 DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 DF 90 CF 90 08 95 A2 E1 B0 E0 ED E6 F1 E1 0C 94 D0 1F FC 01 0A 8B 91 2E 82 2E 73 2E 64 2E 55 2E 46 2E 7D 83 CC 86 DA 86 B9 86 A8 86 26 81 37 81 3F 83 2E 83 D5 01 8D 91 00 -2659 1739748928738 pro JtagIce3 [0x11] <<< 06 00 00 11 80 -2659 1739748928739 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928739 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928745 pro JtagIce3 [0x11] >>> 14 00 9C 91 22 81 33 81 00 84 F1 85 E0 2D 31 97 37 FF 02 C0 21 E0 30 E0 4E 81 5F 81 E4 0F F5 1F 10 82 FC 83 EB 83 17 01 A1 E0 B0 E0 BA 83 A9 83 F9 01 EE 19 FF 09 FE 87 ED 87 9C 01 22 70 33 27 38 8B 2F 87 3A 85 33 0F 33 0B 39 8B EB 81 FC 81 2E 81 3F 81 E2 1B F3 0B 4B 81 5C 81 42 17 53 07 09 F4 4F C0 2A 89 39 2D 48 2D 57 2D 66 2D 75 2D 84 2D 9D 81 A0 E0 0E 94 B9 22 99 F1 4C 85 4B 87 A4 2E 00 -2659 1739748928745 pro JtagIce3 [0x11] <<< 06 00 00 11 C0 -2659 1739748928746 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928746 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928751 pro JtagIce3 [0x11] >>> 14 00 BA 84 C9 88 DC 2C EC 2C FC 2C 0C 2D 1C 2D 2A 89 39 2D 48 2D 57 2D 66 2D 75 2D 84 2D 9D 81 0E 94 54 22 C9 01 29 83 9A 83 80 5D AB 81 BC 81 8E 93 BC 83 AB 83 B1 E0 2B 1A 31 08 2A 89 39 2D 48 2D 57 2D 66 2D 75 2D 84 2D 9D 81 0E 94 56 22 2A 8B 93 2E 84 2E 75 2E 66 2E 57 2E 48 2E 9D 83 B5 CF 8D 85 9E 85 82 0D 93 1D 18 16 19 06 34 F2 12 14 13 04 44 F4 8F 85 98 89 89 2B 09 F0 BE CF 02 C0 00 -2659 1739748928751 pro JtagIce3 [0x11] <<< 06 00 00 12 00 -2659 1739748928752 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928752 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928758 pro JtagIce3 [0x11] >>> 14 00 E0 E0 F0 E0 A9 81 BA 81 AB 2B 41 F4 A8 85 B9 85 8D 91 9C 91 11 97 8F 7E 8D 93 9C 93 CF 01 62 96 E2 E1 0C 94 EC 1F CF 93 DF 93 CD B7 DE B7 C1 54 D1 09 0F B6 F8 94 DE BF 0F BE CD BF 0E 94 E5 14 8F EC 97 E0 01 97 F1 F7 00 C0 00 00 84 E7 95 E0 0E 94 A1 21 27 96 4F AD 27 97 4B 30 10 F4 50 E0 02 C0 4A E0 50 E0 BE 01 69 5B 7F 4F 89 E7 95 E0 0E 94 D0 22 C9 5B DE 4F 48 81 C7 54 D1 40 4B 30 00 -2659 1739748928758 pro JtagIce3 [0x11] <<< 06 00 00 12 40 -2659 1739748928759 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928759 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928764 pro JtagIce3 [0x11] >>> 14 00 10 F4 50 E0 02 C0 4A E0 50 E0 BE 01 69 53 7F 4F 83 E8 95 E0 0E 94 D0 22 E4 E7 F5 E0 84 E1 80 83 81 E0 84 83 83 83 8D B7 9E B7 81 54 91 09 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 81 E4 01 90 0D 92 8A 95 E1 F7 0E 94 C7 18 0F B6 F8 94 DE BF 0F BE CD BF 84 E6 90 E0 0E 94 19 1F 80 93 6C 06 88 23 E1 F1 CE 01 01 96 0E 94 00 1A 81 E4 FE 01 31 96 A3 E3 B5 E0 01 90 0D 92 8A 95 E1 F7 00 -2659 1739748928764 pro JtagIce3 [0x11] <<< 06 00 00 12 80 -2659 1739748928765 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928765 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928771 pro JtagIce3 [0x11] >>> 14 00 80 91 37 05 82 30 69 F5 EC E3 F6 E0 C8 5B DE 4F 88 81 C8 54 D1 40 28 2F 80 83 A3 E3 B5 E0 16 96 8C 91 16 97 38 2F 81 83 17 96 8C 91 17 97 48 2F 82 83 18 96 8C 91 18 97 68 2F 84 83 19 96 8C 91 19 97 78 2F 85 83 1A 96 8C 91 1A 97 86 83 1B 96 9C 91 59 2F 93 83 0E 94 54 13 81 E0 03 C0 82 E0 01 C0 82 E0 CF 5B DF 4F 0F B6 F8 94 DE BF 0F BE CD BF DF 91 CF 91 08 95 AF 92 BF 92 CF 92 DF 92 00 -2659 1739748928771 pro JtagIce3 [0x11] <<< 06 00 00 12 C0 -2659 1739748928772 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928772 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928777 pro JtagIce3 [0x11] >>> 14 00 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 CD B7 DE B7 C1 50 D1 40 0F B6 F8 94 DE BF 0F BE CD BF 6C 01 CE 01 01 96 0E 94 67 19 81 E0 91 E0 FE 01 31 96 A2 E5 B3 E0 01 90 0D 92 01 97 E1 F7 40 91 52 03 63 E5 73 E0 CE 01 01 96 0E 94 9B 1B 87 E1 FE 01 31 96 AF EE B5 E0 01 90 0D 92 8A 95 E1 F7 6C E2 70 E0 8F EE 95 E0 0E 94 AD 22 00 97 11 F1 8C 01 0F 5E 15 40 78 01 FF 24 0F 2E FF EE AF 2E F5 E0 00 -2659 1739748928777 pro JtagIce3 [0x11] <<< 06 00 00 13 00 -2659 1739748928778 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928778 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928784 pro JtagIce3 [0x11] >>> 14 00 BF 2E F0 2D A7 01 B5 01 80 E5 92 E0 0E 94 D0 22 F5 01 15 89 56 89 B7 01 60 51 7A 4F 41 2F 80 ED 92 E0 0E 94 D0 22 00 93 4F 02 10 1B 10 93 50 03 17 C0 EF EE F5 E0 15 89 56 89 41 2F BF 01 80 E5 92 E0 0E 94 D0 22 10 93 4F 02 E0 ED F2 E0 8E E4 9F E2 91 83 80 83 81 E4 82 83 83 E0 80 93 50 03 4B E3 60 E0 80 E5 92 E0 0E 94 69 1E 80 93 51 03 83 E0 91 E0 EF E4 F2 E0 D6 01 01 90 0D 92 01 97 00 -2659 1739748928784 pro JtagIce3 [0x11] <<< 06 00 00 13 40 -2659 1739748928785 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928785 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928791 pro JtagIce3 [0x11] >>> 14 00 E1 F7 C6 01 CF 5F DE 4F 0F B6 F8 94 DE BF 0F BE CD BF DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 DF 90 CF 90 BF 90 AF 90 08 95 AF 92 BF 92 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 CD B7 DE B7 27 97 0F B6 F8 94 DE BF 0F BE CD BF 5C 83 A2 2E D3 2E E4 2E F6 2E 07 2F B8 2E 80 ED 0E 94 44 1C C8 2E 81 11 5D C0 86 E0 0E 94 B4 1F 1D EC A1 9E 81 2D 11 24 86 95 86 95 86 95 98 2F 99 0F 89 0F 00 -2659 1739748928791 pro JtagIce3 [0x11] <<< 06 00 00 13 80 -2659 1739748928792 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928792 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928797 pro JtagIce3 [0x11] >>> 14 00 88 0F 8A 0D 0E 94 B4 1F D1 9E 81 2D 11 24 86 95 86 95 86 95 98 2F 99 0F 89 0F 88 0F 8D 0D 0E 94 B4 1F E1 9E 91 2D 11 24 96 95 96 95 96 95 89 2F 88 0F 89 0F 88 0F 8E 0D 0E 94 B4 1F 8C 81 0E 94 B4 1F F1 9E 91 2D 11 24 96 95 96 95 96 95 89 2F 88 0F 98 0F 89 2F 88 0F 8F 0D 0E 94 B4 1F 01 9F 11 2D 11 24 16 95 16 95 16 95 81 2F 88 0F 18 0F 81 2F 88 0F 80 0F 0E 94 B4 1F 8B 2D 90 E0 4E 96 00 -2659 1739748928797 pro JtagIce3 [0x11] <<< 06 00 00 13 C0 -2659 1739748928798 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928798 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928804 pro JtagIce3 [0x11] >>> 14 00 6A E0 70 E0 0E 94 30 21 86 2F 88 0F 68 0F 66 0F 8E E1 8B 0D 86 0F 0E 94 B4 1F 0E 94 6B 21 02 C0 CC 24 C3 94 8C 2D 27 96 0F B6 F8 94 DE BF 0F BE CD BF DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 DF 90 CF 90 BF 90 AF 90 08 95 CF 93 DF 93 CD B7 DE B7 27 97 0F B6 F8 94 DE BF 0F BE CD BF 83 E4 96 E0 0E 94 95 23 A3 E4 B6 E0 9C 91 EC E3 F6 E0 89 2F 82 95 8F 70 28 2F 22 0F 82 0F 88 0F 98 1B 29 2F 00 -2659 1739748928804 pro JtagIce3 [0x11] <<< 06 00 00 14 00 -2659 1739748928805 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928805 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928810 pro JtagIce3 [0x11] >>> 14 00 90 83 11 96 9C 91 11 97 89 2F 82 95 8F 70 38 2F 33 0F 83 0F 88 0F 98 1B 39 2F 91 83 12 96 4C 91 12 97 84 2F 90 E0 8F 7B 95 95 87 95 95 95 87 95 95 95 87 95 95 95 87 95 98 2F 99 0F 89 0F 88 0F 4F 7B 48 1B 42 83 13 96 8C 91 13 97 58 2F 83 83 14 96 9C 91 14 97 89 2F 82 95 8F 70 68 2F 66 0F 86 0F 88 0F 98 1B 69 2F 94 83 15 96 7C 91 15 97 87 2F 90 E0 8F 77 95 95 87 95 95 95 87 95 95 95 00 -2659 1739748928810 pro JtagIce3 [0x11] <<< 06 00 00 14 40 -2659 1739748928811 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928811 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928817 pro JtagIce3 [0x11] >>> 14 00 87 95 95 95 87 95 98 2F 99 0F 89 0F 88 0F 7F 77 78 1B 75 83 16 96 8C 91 98 2F 92 95 9F 70 A9 2F AA 0F 9A 0F 99 0F 8E 51 89 1B 86 83 0E 94 96 1A 87 E0 EC E3 F6 E0 DE 01 11 96 01 90 0D 92 8A 95 E1 F7 29 81 3A 81 4B 81 5C 81 6D 81 7E 81 8F 81 90 E0 27 96 0F B6 F8 94 DE BF 0F BE CD BF DF 91 CF 91 08 95 8F 92 9F 92 AF 92 BF 92 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 8B 01 9C 01 57 E1 36 95 00 -2659 1739748928817 pro JtagIce3 [0x11] <<< 06 00 00 14 80 -2659 1739748928818 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928818 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928823 pro JtagIce3 [0x11] >>> 14 00 27 95 17 95 07 95 5A 95 D1 F7 11 27 A8 01 4F 57 51 09 47 31 51 05 0C F0 45 C0 57 FD 2D C0 0F EF 1F EF 2F E7 30 E0 04 C0 35 95 27 95 17 95 07 95 4A 95 D2 F7 48 01 59 01 86 22 97 22 A8 22 B9 22 89 28 8A 28 8B 28 71 F1 97 FF 07 C0 DC 01 CB 01 80 0F 91 1F A2 1F B3 1F 02 C0 DC 01 CB 01 00 95 10 95 20 95 30 95 80 23 91 23 A2 23 B3 23 48 2F 39 2F 2A 2F 5B 2F 1A C0 97 FF 0F C0 8B 01 9C 01 00 -2659 1739748928823 pro JtagIce3 [0x11] <<< 06 00 00 14 C0 -2659 1739748928824 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928824 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928830 pro JtagIce3 [0x11] >>> 14 00 00 0F 11 1F 22 1F 33 1F 01 2B 02 2B 03 2B 51 F0 40 E0 30 E0 20 E8 5F EB 09 C0 40 E0 30 E0 20 E0 50 E0 04 C0 46 2F 37 2F 28 2F 59 2F 64 2F 73 2F 82 2F 95 2F 1F 91 0F 91 FF 90 EF 90 DF 90 CF 90 BF 90 AF 90 9F 90 8F 90 08 95 CF 93 DF 93 00 D0 CD B7 DE B7 0E 94 3A 20 81 E6 0E 94 2D 23 2F EF 80 E7 92 E0 21 50 80 40 90 40 E1 F7 00 C0 00 00 0E 94 08 21 82 E6 0E 94 2D 23 6C E6 87 E0 0E 94 00 -2659 1739748928830 pro JtagIce3 [0x11] <<< 06 00 00 15 00 -2659 1739748928831 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928831 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928836 pro JtagIce3 [0x11] >>> 14 00 B2 20 60 E8 88 E0 0E 94 B2 20 60 E0 89 E0 0E 94 B2 20 60 E1 85 E0 0E 94 B2 20 6F E8 8C E3 0E 94 B2 20 60 E3 8F E6 0E 94 B2 20 8D E2 89 83 84 ED 8A 83 42 E0 BE 01 6F 5F 7F 4F 8F E2 0E 94 A7 1C 68 E8 8E E2 0E 94 B2 20 61 E0 82 E0 0E 94 B2 20 60 E0 83 E0 0E 94 B2 20 60 E8 84 E0 0E 94 B2 20 60 E1 86 E0 0E 94 B2 20 60 E0 86 E0 0E 94 B2 20 60 EE 89 E1 0E 94 B2 20 60 EE 8A E1 0E 94 B2 20 00 -2659 1739748928836 pro JtagIce3 [0x11] <<< 06 00 00 15 40 -2659 1739748928837 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928837 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928843 pro JtagIce3 [0x11] >>> 14 00 60 ED 87 E3 0E 94 B2 20 60 E0 8C E2 0E 94 B2 20 64 E0 8D E2 0E 94 B2 20 6F E7 81 E1 0E 94 B2 20 0F 90 0F 90 DF 91 CF 91 08 95 10 C0 0E 94 B8 23 58 F0 0E 94 B1 23 40 F0 29 F4 5F 3F 29 F0 0C 94 DE 23 51 11 0C 94 C0 23 0C 94 10 24 0E 94 F7 1E 68 F3 99 23 B1 F3 55 23 91 F3 95 1B 55 0B BB 27 AA 27 62 17 73 07 84 07 38 F0 9F 5F 5F 4F 22 0F 33 1F 44 1F AA 1F A9 F3 35 D0 0E 2E 3A F0 E0 E8 00 -2659 1739748928843 pro JtagIce3 [0x11] <<< 06 00 00 15 80 -2659 1739748928844 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928844 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928849 pro JtagIce3 [0x11] >>> 14 00 32 D0 91 50 50 40 E6 95 00 1C CA F7 2B D0 FE 2F 29 D0 66 0F 77 1F 88 1F BB 1F 26 17 37 07 48 07 AB 07 B0 E8 09 F0 BB 0B 80 2D BF 01 FF 27 93 58 5F 4F 3A F0 9E 3F 51 05 78 F0 0C 94 DE 23 0C 94 C0 23 5F 3F E4 F3 98 3E D4 F3 86 95 77 95 67 95 B7 95 F7 95 9F 5F C9 F7 88 0F 91 1D 96 95 87 95 97 F9 08 95 E1 E0 66 0F 77 1F 88 1F BB 1F 62 17 73 07 84 07 BA 07 20 F0 62 1B 73 0B 84 0B BA 0B 00 -2659 1739748928849 pro JtagIce3 [0x11] <<< 06 00 00 15 C0 -2659 1739748928850 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928850 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928856 pro JtagIce3 [0x11] >>> 14 00 EE 1F 88 F7 E0 95 08 95 CF 93 DF 93 DC 01 F9 01 64 38 71 05 D9 F1 64 F4 61 38 71 05 21 F1 62 38 71 05 09 F4 40 C0 60 38 71 05 09 F0 54 C0 2E C0 60 39 71 05 C1 F1 84 F4 68 38 71 05 09 F0 4B C0 C0 81 D1 81 CE 01 02 96 91 83 80 83 E8 81 F9 81 ED 93 FC 93 40 83 3C C0 60 3A 71 05 B9 F0 60 3C 71 05 A1 F0 38 C0 C0 81 D1 81 CE 01 02 96 91 83 80 83 E8 81 F9 81 ED 93 FC 93 05 2E 00 0C 66 0B 00 -2659 1739748928856 pro JtagIce3 [0x11] <<< 06 00 00 16 00 -2659 1739748928857 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928857 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928862 pro JtagIce3 [0x11] >>> 14 00 77 0B 40 83 51 83 62 83 73 83 22 C0 C0 81 D1 81 CE 01 02 96 91 83 80 83 E8 81 F9 81 ED 93 FC 93 51 83 40 83 15 C0 C0 81 D1 81 CE 01 02 96 91 83 80 83 E8 81 F9 81 ED 93 FC 93 51 83 40 83 85 2F 88 0F 88 0B 82 83 83 83 84 83 85 83 86 83 87 83 81 E0 90 E0 02 C0 80 E0 90 E0 DF 91 CF 91 08 95 0F C0 0E 94 B1 23 38 F0 0E 94 B8 23 20 F0 95 23 11 F0 0C 94 DE 23 0C 94 10 24 11 24 0C 94 C0 23 00 -2659 1739748928862 pro JtagIce3 [0x11] <<< 06 00 00 16 40 -2659 1739748928863 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928863 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928869 pro JtagIce3 [0x11] >>> 14 00 0E 94 F7 1E 70 F3 95 9F C1 F3 95 0F 50 E0 55 1F 62 9F F0 01 72 9F BB 27 F0 0D B1 1D 63 9F AA 27 F0 0D B1 1D AA 1F 64 9F 66 27 B0 0D A1 1D 66 1F 82 9F 22 27 B0 0D A1 1D 62 1F 73 9F B0 0D A1 1D 62 1F 83 9F A0 0D 61 1D 22 1F 74 9F 33 27 A0 0D 61 1D 23 1F 84 9F 60 0D 21 1D 82 2F 76 2F 6A 2F 11 24 9F 57 50 40 9A F0 F1 F0 88 23 4A F0 EE 0F FF 1F BB 1F 66 1F 77 1F 88 1F 91 50 50 40 A9 F7 00 -2659 1739748928869 pro JtagIce3 [0x11] <<< 06 00 00 16 80 -2659 1739748928870 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928870 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928875 pro JtagIce3 [0x11] >>> 14 00 9E 3F 51 05 80 F0 0C 94 DE 23 0C 94 C0 23 5F 3F E4 F3 98 3E D4 F3 86 95 77 95 67 95 B7 95 F7 95 E7 95 9F 5F C1 F7 FE 2B 88 0F 91 1D 96 95 87 95 97 F9 08 95 A2 E0 B0 E0 E0 EA F6 E1 0C 94 D0 1F 1C 01 4B 01 FA 01 DB 01 12 96 2D 91 3C 91 13 97 14 96 4D 90 5C 90 15 97 8D 91 9C 91 11 97 9A 83 89 83 16 96 6D 90 7C 90 17 97 37 FD 03 C0 8D 7F 9A 83 89 83 00 81 11 81 22 81 33 81 44 81 55 81 00 -2659 1739748928875 pro JtagIce3 [0x11] <<< 06 00 00 16 C0 -2659 1739748928876 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928876 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928882 pro JtagIce3 [0x11] >>> 14 00 66 81 77 81 FE 01 31 96 5F 01 88 E0 C8 2E D1 2C 72 01 C4 01 0E 94 67 11 29 81 24 FF 06 C0 01 97 F3 01 E8 0F F9 1F 20 E3 20 83 29 81 23 FF 06 C0 01 97 F3 01 E8 0F F9 1F 20 E2 20 83 09 81 1A 81 D4 01 18 96 4D 91 5C 91 19 97 41 50 51 09 48 1B 59 0B B3 01 68 0F 79 1F 92 01 C1 01 0E 94 D4 1B 9C 01 F1 01 80 81 91 81 90 FF 08 C0 D4 01 12 96 8D 91 9C 91 13 97 82 17 93 07 0C F4 C9 01 22 96 00 -2659 1739748928882 pro JtagIce3 [0x11] <<< 06 00 00 17 00 -2659 1739748928883 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928883 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928888 pro JtagIce3 [0x11] >>> 14 00 E2 E1 0C 94 EC 1F 11 C0 0E 94 B1 23 38 F0 0E 94 B8 23 20 F0 39 F4 9F 3F 19 F4 26 F4 0C 94 10 24 0E F4 E0 95 E7 FB 0C 94 DE 23 E9 2F 0E 94 F7 1E 58 F3 BA 17 62 07 73 07 84 07 95 07 20 F0 79 F4 A6 F5 0C 94 BF 23 0E F4 E0 95 0B 2E BA 2F A0 2D 0B 01 B9 01 90 01 0C 01 CA 01 A0 01 11 24 FF 27 59 1B 99 F0 59 3F 50 F4 50 3E 68 F1 1A 16 F0 40 A2 2F 23 2F 34 2F 44 27 58 5F F3 CF 46 95 37 95 00 -2659 1739748928888 pro JtagIce3 [0x11] <<< 06 00 00 17 40 -2659 1739748928889 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928889 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928895 pro JtagIce3 [0x11] >>> 14 00 27 95 A7 95 F0 40 53 95 C9 F7 7E F4 1F 16 BA 0B 62 0B 73 0B 84 0B BA F0 91 50 A1 F0 FF 0F BB 1F 66 1F 77 1F 88 1F C2 F7 0E C0 BA 0F 62 1F 73 1F 84 1F 48 F4 87 95 77 95 67 95 B7 95 F7 95 9E 3F 08 F0 B0 CF 93 95 88 0F 08 F0 99 27 EE 0F 97 95 87 95 08 95 4F 92 5F 92 6F 92 7F 92 8F 92 9F 92 AF 92 BF 92 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 06 2F 10 92 68 06 66 23 C1 F1 C8 2F 00 -2659 1739748928895 pro JtagIce3 [0x11] <<< 06 00 00 17 80 -2659 1739748928896 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928896 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928901 pro JtagIce3 [0x11] >>> 14 00 D9 2F 10 E0 60 E0 70 E0 CB 01 CC 24 CA 94 DC 2C EC 2C F1 2C 29 91 4B 01 5C 01 88 0C 99 1C AA 1C BB 1C 88 0C 99 1C AA 1C BB 1C 88 0C 99 1C AA 1C BB 1C 88 0C 99 1C AA 1C BB 1C 88 0C 99 1C AA 1C BB 1C 24 01 35 01 46 1A 57 0A 68 0A 79 0A C3 01 B2 01 62 0F 71 1D 81 1D 91 1D A7 01 96 01 0E 94 D5 1E 1F 5F 10 93 68 06 01 13 D4 CF 03 C0 60 E0 70 E0 CB 01 DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 00 -2659 1739748928901 pro JtagIce3 [0x11] <<< 06 00 00 17 C0 -2659 1739748928902 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928902 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928908 pro JtagIce3 [0x11] >>> 14 00 DF 90 CF 90 BF 90 AF 90 9F 90 8F 90 7F 90 6F 90 5F 90 4F 90 08 95 A2 E0 B0 E0 E1 ED F7 E1 0C 94 D0 1F 3C 01 4B 01 FA 01 DB 01 12 96 2D 91 3C 91 13 97 14 96 4D 90 5C 90 15 97 8D 91 9C 91 11 97 9A 83 89 83 16 96 2D 90 3C 90 17 97 37 FD 03 C0 8D 7F 9A 83 89 83 00 81 11 81 22 81 33 81 44 81 55 81 66 81 77 81 FE 01 31 96 5F 01 8A E0 C8 2E D1 2C 72 01 C4 01 0E 94 67 11 09 81 1A 81 D4 01 00 -2659 1739748928908 pro JtagIce3 [0x11] <<< 06 00 00 18 00 -2659 1739748928909 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928909 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928914 pro JtagIce3 [0x11] >>> 14 00 18 96 4D 91 5C 91 19 97 41 50 51 09 48 1B 59 0B B1 01 68 0F 79 1F 92 01 C3 01 0E 94 D4 1B 9C 01 F3 01 80 81 91 81 90 FF 08 C0 D4 01 12 96 8D 91 9C 91 13 97 82 17 93 07 0C F4 C9 01 22 96 E2 E1 0C 94 EC 1F BF 92 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 C8 2F 16 2F 07 2F 7A 01 D2 2F 88 0F 0E 94 44 1C 81 11 31 C0 80 2F 0E 94 B4 1F 81 2F 0E 94 B4 1F 8C 2F 88 0F 81 60 0E 94 44 1C 00 -2659 1739748928914 pro JtagIce3 [0x11] <<< 06 00 00 18 40 -2659 1739748928915 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928915 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928921 pro JtagIce3 [0x11] >>> 14 00 B8 2E 81 11 26 C0 CD 2E D1 2C 81 E0 C8 1A D1 08 1C 14 1D 04 74 F4 C0 E0 87 01 0C 0F 11 1D 0E 94 DE 20 F8 01 80 83 CF 5F 8C 2F 90 E0 8C 15 9D 05 9C F3 2D 2F 30 E0 21 50 31 09 E7 01 C2 0F D3 1F 0E 94 F3 20 88 83 0E 94 6B 21 05 C0 BB 24 B3 94 02 C0 BB 24 B3 94 8B 2D DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 DF 90 CF 90 BF 90 08 95 88 24 99 24 F4 01 E4 01 B0 E4 9F 93 AA 27 9A 15 8B 04 9C 04 00 -2659 1739748928921 pro JtagIce3 [0x11] <<< 06 00 00 18 80 -2659 1739748928922 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928922 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928927 pro JtagIce3 [0x11] >>> 14 00 ED 05 FE 05 CF 05 D0 07 A1 07 98 F4 AD 2F DC 2F CF 2F FE 2F E9 2D 98 2C 89 2E 98 2F 87 2F 76 2F 65 2F 54 2F 43 2F 32 2F 22 27 B8 50 31 F7 BF 91 27 C0 1B 2E BF 91 BB 27 22 0F 33 1F 44 1F 55 1F 66 1F 77 1F 88 1F 99 1F 88 1C 99 1C EE 1F FF 1F CC 1F DD 1F AA 1F BB 1F 8A 14 9B 04 EC 05 FD 05 CE 05 DF 05 A0 07 B1 07 48 F0 8A 18 9B 08 EC 09 FD 09 CE 09 DF 09 A0 0B B1 0B 21 60 1A 94 E1 F6 00 -2659 1739748928927 pro JtagIce3 [0x11] <<< 06 00 00 18 C0 -2659 1739748928928 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928928 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928934 pro JtagIce3 [0x11] >>> 14 00 2E F4 94 01 AF 01 BE 01 CD 01 00 0C 08 95 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 CD B7 DE B7 E9 84 0E 94 3D 23 0E 94 35 23 81 E0 0E 94 79 23 80 E8 0E 94 53 20 8C E3 8E 15 20 F4 0F 2E FC E3 EF 2E F0 2D 84 E0 8E 0D 0E 94 53 20 8A 85 0E 94 53 20 8B 85 0E 94 53 20 8C 85 0E 94 53 20 8D 85 0E 94 53 20 EE 20 B1 F0 8E 01 02 5F 1F 4F EA 94 F1 2C 96 E0 E9 0E F1 1C E9 E0 F0 E0 EC 0F FD 1F EE 0E 00 -2659 1739748928934 pro JtagIce3 [0x11] <<< 06 00 00 19 00 -2659 1739748928934 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928934 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928940 pro JtagIce3 [0x11] >>> 14 00 FF 1E F8 01 81 91 8F 01 0E 94 53 20 0E 15 1F 05 C1 F7 80 E0 0E 94 79 23 0E 94 84 20 0E 94 3D 23 DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 08 95 BF 92 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 C8 2F 16 2F 7A 01 D2 2F 88 0F 0E 94 44 1C 81 11 2E C0 81 2F 0E 94 B4 1F 8C 2F 88 0F 81 60 0E 94 44 1C B8 2E 81 11 26 C0 CD 2E D1 2C 81 E0 C8 1A D1 08 1C 14 1D 04 74 F4 C0 E0 87 01 0C 0F 11 1D 00 -2659 1739748928940 pro JtagIce3 [0x11] <<< 06 00 00 19 40 -2659 1739748928941 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928941 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928946 pro JtagIce3 [0x11] >>> 14 00 0E 94 DE 20 F8 01 80 83 CF 5F 8C 2F 90 E0 8C 15 9D 05 9C F3 2D 2F 30 E0 21 50 31 09 E7 01 C2 0F D3 1F 0E 94 F3 20 88 83 0E 94 6B 21 05 C0 BB 24 B3 94 02 C0 BB 24 B3 94 8B 2D DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 DF 90 CF 90 BF 90 08 95 0F 93 1F 93 CF 93 DF 93 CD B7 DE B7 C1 50 D1 40 0F B6 F8 94 DE BF 0F BE CD BF 8C 01 80 E0 0E 94 80 23 81 E0 0E 94 87 23 8F EC 97 E0 01 97 F1 F7 00 C0 00 -2659 1739748928946 pro JtagIce3 [0x11] <<< 06 00 00 19 80 -2659 1739748928947 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928947 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928953 pro JtagIce3 [0x11] >>> 14 00 00 00 44 E0 50 E0 60 E4 81 EF 94 E0 0E 94 8E 23 61 EF 74 E0 CE 01 01 96 0E 94 5E 0E 81 E0 91 E0 FE 01 31 96 A2 E5 B3 E0 01 90 0D 92 01 97 E1 F7 81 E0 0E 94 80 23 80 E0 0E 94 87 23 81 E0 91 E0 E2 E5 F3 E0 D8 01 01 90 0D 92 01 97 E1 F7 C8 01 CF 5F DE 4F 0F B6 F8 94 DE BF 0F BE CD BF DF 91 CF 91 1F 91 0F 91 08 95 0F 93 1F 93 CF 93 DF 93 DB 01 10 97 19 F4 8F EF 9F EF 3D C0 2D 91 3C 91 00 -2659 1739748928953 pro JtagIce3 [0x11] <<< 06 00 00 19 C0 -2659 1739748928954 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928954 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928959 pro JtagIce3 [0x11] >>> 14 00 11 97 30 FF 25 C0 16 96 4D 91 5C 91 17 97 14 96 2D 91 3C 91 15 97 42 17 53 07 78 F4 12 96 ED 91 FC 91 13 97 80 83 12 96 2D 91 3C 91 13 97 2F 5F 3F 4F 13 96 3C 93 2E 93 12 97 16 96 2D 91 3C 91 17 97 2F 5F 3F 4F 17 96 3C 93 2E 93 16 97 13 C0 1C 96 ED 91 FC 91 1D 97 30 97 69 F2 EB 01 09 2F 18 2F 09 95 89 2B 39 F6 8E 81 9F 81 01 96 9F 83 8E 83 81 2F 90 2F DF 91 CF 91 1F 91 0F 91 08 95 00 -2659 1739748928959 pro JtagIce3 [0x11] <<< 06 00 00 1A 00 -2659 1739748928960 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928960 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928966 pro JtagIce3 [0x11] >>> 14 00 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 7C 01 4C E3 50 E0 60 E2 70 E0 88 E3 95 E0 0E 94 1B 23 81 E0 0E 94 79 23 80 E0 0E 94 53 20 0E 94 FC 23 C3 E3 D5 E0 84 50 88 83 0E 94 FC 23 89 83 0E 94 FC 23 8A 83 0E 94 FC 23 8B 83 0E 94 FC 23 8C 83 08 81 00 23 61 F0 C8 E3 D5 E0 01 50 10 E0 07 5C 1A 4F 0E 94 FC 23 89 93 C0 17 D1 07 D1 F7 80 E0 0E 94 79 23 0E 94 08 21 81 E4 E3 E3 F5 E0 D7 01 01 90 00 -2659 1739748928966 pro JtagIce3 [0x11] <<< 06 00 00 1A 40 -2659 1739748928967 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928967 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928972 pro JtagIce3 [0x11] >>> 14 00 0D 92 8A 95 E1 F7 C7 01 DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 08 95 FF 92 0F 93 1F 93 CF 93 DF 93 C8 2F 8B 01 F4 2E 80 E0 0E 94 79 23 81 E0 0E 94 72 23 86 E0 0E 94 53 20 80 E0 0E 94 72 23 81 E0 0E 94 72 23 82 E0 0E 94 53 20 8C 2F 0E 94 FF 21 FF 20 49 F0 E8 01 0F 0D 11 1D 89 91 0E 94 53 20 C0 17 D1 07 D1 F7 80 E0 0E 94 72 23 81 E0 0E 94 72 23 84 E0 0E 94 53 20 80 E0 0E 94 72 23 81 E0 00 -2659 1739748928972 pro JtagIce3 [0x11] <<< 06 00 00 1A 80 -2659 1739748928973 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928973 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928979 pro JtagIce3 [0x11] >>> 14 00 0E 94 72 23 85 E0 0E 94 53 20 0E 94 FC 23 80 93 6B 06 80 E0 0E 94 72 23 80 91 6B 06 81 11 EF CF DF 91 CF 91 1F 91 0F 91 FF 90 08 95 0F 93 1F 93 CF 93 DF 93 CD B7 DE B7 A1 97 0F B6 F8 94 DE BF 0F BE CD BF 3C 8F 4D 8F 6F 8F 78 A3 89 A3 1F 92 2F 93 8C 8D 1F 92 8F 93 8D 8D 1F 92 8F 93 8F 8D 1F 92 8F 93 88 A1 1F 92 8F 93 89 A1 90 E0 80 53 98 4F 9F 93 8F 93 83 ED 95 E0 9F 93 8F 93 1F 92 00 -2659 1739748928979 pro JtagIce3 [0x11] <<< 06 00 00 1A C0 -2659 1739748928980 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928980 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928985 pro JtagIce3 [0x11] >>> 14 00 8A E1 8F 93 8E 01 0F 5F 1F 4F 1F 93 0F 93 0E 94 44 21 C8 01 0E 94 E1 21 8D EE 95 E0 0E 94 E1 21 0F B6 F8 94 DE BF 0F BE CD BF A1 96 0F B6 F8 94 DE BF 0F BE CD BF DF 91 CF 91 1F 91 0F 91 08 95 A0 E1 B0 E0 E6 EE FA E1 0C 94 DA 1F FB 01 BA 01 AE 01 4F 5F 5F 4F 6A 01 40 E1 D6 01 1D 92 4A 95 E9 F7 42 E0 51 E0 5A 83 49 83 9C 83 8B 83 F7 FF 09 C0 8F E4 90 E0 90 93 01 01 80 93 00 01 8F EF 00 -2659 1739748928985 pro JtagIce3 [0x11] <<< 06 00 00 1B 00 -2659 1739748928986 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928986 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928992 pro JtagIce3 [0x11] >>> 14 00 9F EF 1C C0 30 97 29 F0 AF 01 41 50 51 09 5E 83 4D 83 A9 01 8F 01 7C 01 C6 01 0E 94 6C 20 01 15 11 05 61 F0 4F 81 58 85 2D 81 3E 81 42 17 53 07 08 F4 9A 01 F7 01 E2 0F F3 1F 10 82 60 96 E8 E0 0C 94 F6 1F FF 92 0F 93 1F 93 CF 93 DF 93 8C 01 F6 2E 84 E7 95 E0 0E 94 A1 21 40 E4 50 E0 60 E2 70 E0 81 EF 94 E0 0E 94 1B 23 C1 EF D4 E0 10 92 31 05 40 E4 BE 01 8F 2D 0E 94 34 1D 8C E3 FE 01 00 -2659 1739748928992 pro JtagIce3 [0x11] <<< 06 00 00 1B 40 -2659 1739748928993 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928993 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748928998 pro JtagIce3 [0x11] >>> 14 00 A9 E7 B5 E0 01 90 0D 92 8A 95 E1 F7 E4 E7 F5 E0 8C AD 84 83 8D AD 82 83 8E AD 81 83 8F AD 83 83 8C E3 80 83 81 E4 D8 01 01 90 0D 92 8A 95 E1 F7 C8 01 DF 91 CF 91 1F 91 0F 91 FF 90 08 95 A2 E8 B0 E0 E5 E6 FB E1 0C 94 D6 1F 5C 01 4A 01 CF 57 DF 4F 79 83 68 83 C1 58 D0 40 C1 2C D1 2C CF 57 DF 4F E8 81 F9 81 C1 58 D0 40 80 81 88 23 E9 F0 74 01 86 01 20 E8 30 E0 AE 01 4F 5F 5F 4F BE 01 00 -2659 1739748928998 pro JtagIce3 [0x11] <<< 06 00 00 1B 80 -2659 1739748928999 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748928999 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929005 pro JtagIce3 [0x11] >>> 14 00 6F 57 7F 4F C5 01 0E 94 37 0A 8C 0D 9D 1D 8C 15 9D 05 4C F4 8F E4 90 E0 90 93 01 01 80 93 00 01 8F EF 9F EF 03 C0 6C 01 DA CF C6 01 CE 57 DF 4F EC E0 0C 94 F2 1F FF 92 0F 93 1F 93 CF 93 DF 93 EC 01 F6 2E 07 2F 14 2F 44 E1 50 E0 60 E2 70 E0 8F EE 95 E0 0E 94 1B 23 AF 2D B0 2F 20 E0 90 E0 0B C0 80 32 31 F0 E2 2F F0 E0 E1 51 FA 4F 80 83 2F 5F 9F 5F 91 17 18 F4 8D 91 81 11 F2 CF 82 2F 00 -2659 1739748929005 pro JtagIce3 [0x11] <<< 06 00 00 1B C0 -2659 1739748929006 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929006 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929011 pro JtagIce3 [0x11] >>> 14 00 90 E0 90 93 05 06 80 93 04 06 87 E1 EF EE F5 E0 DE 01 01 90 0D 92 8A 95 E1 F7 CE 01 DF 91 CF 91 1F 91 0F 91 FF 90 08 95 A0 E0 B0 E0 EA ED FB E1 0C 94 D6 1F 6C 01 5B 01 7A 01 E9 01 48 01 81 E0 88 22 99 24 00 FD 03 C0 42 17 53 07 50 F0 A7 01 B5 01 C6 01 0E 94 97 1F EC 16 FD 06 10 F0 C7 01 17 C0 8E 01 0E 19 1F 09 01 15 11 05 41 F0 B6 01 80 E2 90 E0 0E 94 B4 19 01 50 11 09 F5 CF 81 14 00 -2659 1739748929011 pro JtagIce3 [0x11] <<< 06 00 00 1C 00 -2659 1739748929012 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929012 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929018 pro JtagIce3 [0x11] >>> 14 00 91 04 29 F4 A7 01 B5 01 C6 01 0E 94 97 1F CE 01 CD B7 DE B7 EC E0 0C 94 F2 1F CF 93 DF 93 CD B7 DE B7 E3 E4 F6 E0 8D 81 80 83 8E 81 81 83 8F 81 82 83 88 85 83 83 89 85 84 83 83 E5 94 E0 0E 94 E1 21 48 E5 54 E0 65 E0 70 E0 83 E4 96 E0 0E 94 18 24 83 E5 94 E0 0E 94 E1 21 64 E1 CE 01 0A 96 0E 94 21 20 8A E0 0E 94 2D 23 83 E5 94 E0 0E 94 E1 21 6D 81 70 E0 41 E7 54 E0 CE 01 0A 96 0E 94 00 -2659 1739748929018 pro JtagIce3 [0x11] <<< 06 00 00 1C 40 -2659 1739748929019 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929019 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929024 pro JtagIce3 [0x11] >>> 14 00 18 24 DF 91 CF 91 08 95 94 EA 90 93 BC 00 9B EF EC EB F0 E0 08 C0 AF EC B7 E0 11 97 F1 F7 00 C0 00 00 91 50 19 F0 20 81 22 23 AC F7 80 93 BB 00 84 E8 80 93 BC 00 8B EF EC EB F0 E0 08 C0 AF EC B7 E0 11 97 F1 F7 00 C0 00 00 81 50 19 F0 90 81 99 23 AC F7 90 91 B9 00 98 7F 98 31 29 F0 81 E0 90 34 19 F4 80 E0 08 95 80 E0 08 95 CF 92 DF 92 FF 92 0F 93 1F 93 CF 93 DF 93 C6 2F 6A 01 12 2F 00 -2659 1739748929024 pro JtagIce3 [0x11] <<< 06 00 00 1C 80 -2659 1739748929025 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929025 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929031 pro JtagIce3 [0x11] >>> 14 00 88 0F 0E 94 44 1C F8 2E 81 11 16 C0 8C 2F 0E 94 B4 1F 11 23 71 F0 E6 01 11 50 01 2F 10 E0 0F 5F 1F 4F 0C 0D 1D 1D 89 91 0E 94 B4 1F C0 17 D1 07 D1 F7 0E 94 6B 21 02 C0 FF 24 F3 94 8F 2D DF 91 CF 91 1F 91 0F 91 FF 90 DF 90 CF 90 08 95 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 D8 2F 7B 01 C4 2F 81 E0 0E 94 79 23 8D 2F 80 68 0E 94 53 20 D8 2E 8F EF 8C 0F CC 23 69 F0 E7 01 08 2F 10 E0 00 -2659 1739748929031 pro JtagIce3 [0x11] <<< 06 00 00 1C C0 -2659 1739748929032 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929032 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929037 pro JtagIce3 [0x11] >>> 14 00 0F 5F 1F 4F 0E 0D 1F 1D 89 91 0E 94 53 20 C0 17 D1 07 D1 F7 80 E0 0E 94 79 23 8D 2D DF 91 CF 91 1F 91 0F 91 FF 90 EF 90 DF 90 08 95 1F 93 CF 93 DF 93 CD B7 DE B7 0E 94 1C 22 8F 3F 19 F0 11 E0 18 0F 01 C0 11 E0 8D B7 9E B7 81 54 91 09 0F B6 F8 94 9E BF 0F BE 8D BF AD B7 BE B7 11 96 81 E4 FE 01 36 96 01 90 0D 92 8A 95 E1 F7 81 2F 0E 94 62 1D 0F B6 F8 94 DE BF 0F BE CD BF 81 2F 0E 94 00 -2659 1739748929037 pro JtagIce3 [0x11] <<< 06 00 00 1D 00 -2659 1739748929038 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929038 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929044 pro JtagIce3 [0x11] >>> 14 00 00 23 DF 91 CF 91 1F 91 08 95 0E 94 FF 1E 88 F0 9F 57 98 F0 B9 2F 99 27 B7 51 B0 F0 E1 F0 66 0F 77 1F 88 1F 99 1F 1A F0 BA 95 C9 F7 14 C0 B1 30 91 F0 0E 94 BF 23 B1 E0 08 95 0C 94 BF 23 67 2F 78 2F 88 27 B8 5F 39 F0 B9 3F CC F3 86 95 77 95 67 95 B3 95 D9 F7 3E F4 90 95 80 95 70 95 61 95 7F 4F 8F 4F 9F 4F 08 95 FF 92 0F 93 1F 93 CF 93 DF 93 C8 2F 8B 01 F4 2E 81 E0 0E 94 72 23 84 E0 00 -2659 1739748929044 pro JtagIce3 [0x11] <<< 06 00 00 1D 40 -2659 1739748929045 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929045 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929050 pro JtagIce3 [0x11] >>> 14 00 0E 94 53 20 80 E0 0E 94 72 23 81 E0 0E 94 72 23 83 E0 0E 94 53 20 8C 2F 0E 94 FF 21 FF 20 49 F0 E8 01 0F 0D 11 1D 0E 94 FC 23 89 93 C0 17 D1 07 D1 F7 80 E0 0E 94 72 23 DF 91 CF 91 1F 91 0F 91 FF 90 08 95 1F 93 CF 93 DF 93 CD B7 DE B7 88 23 19 F1 18 2F 40 E4 50 E0 60 E2 70 E0 81 EF 94 E0 0E 94 1B 23 81 EF 94 E0 10 92 31 05 2C E3 FE 01 3B 96 DC 01 01 90 0D 92 2A 95 E1 F7 2A 85 FC 01 00 -2659 1739748929050 pro JtagIce3 [0x11] <<< 06 00 00 1D 80 -2659 1739748929051 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929051 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929057 pro JtagIce3 [0x11] >>> 14 00 24 AF 28 85 25 AF 2F 81 26 AF 29 85 27 AF 40 E4 BC 01 81 2F 0E 94 4B 1A DF 91 CF 91 1F 91 08 95 1F 92 0F 92 0F B6 0F 92 11 24 2F 93 3F 93 4F 93 5F 93 6F 93 7F 93 8F 93 9F 93 AF 93 BF 93 EF 93 FF 93 F8 94 80 91 72 06 81 11 07 C0 81 E0 80 93 6F 06 80 93 72 06 0E 94 2A 22 FF 91 EF 91 BF 91 AF 91 9F 91 8F 91 7F 91 6F 91 5F 91 4F 91 3F 91 2F 91 0F 90 0F BE 0F 90 1F 90 18 95 DC 01 ED 91 00 -2659 1739748929057 pro JtagIce3 [0x11] <<< 06 00 00 1D C0 -2659 1739748929058 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929058 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929063 pro JtagIce3 [0x11] >>> 14 00 FC 91 11 97 80 81 8A 32 21 F0 80 E0 90 E0 3A E0 0E C0 31 96 ED 93 FC 93 DB 01 ED 91 FC 91 11 97 CF 01 02 96 8D 93 9C 93 80 81 91 81 08 95 ED 91 FC 91 11 97 20 81 20 53 2A 30 68 F4 38 9F A0 01 39 9F 50 0D 11 24 CA 01 82 0F 91 1D 31 96 11 96 FC 93 EE 93 EC CF 08 95 1F 92 0F 92 0F B6 0F 92 11 24 2F 93 3F 93 4F 93 5F 93 6F 93 7F 93 8F 93 9F 93 AF 93 BF 93 EF 93 FF 93 F8 94 82 E0 91 E0 00 -2659 1739748929063 pro JtagIce3 [0x11] <<< 06 00 00 1E 00 -2659 1739748929064 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929064 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929070 pro JtagIce3 [0x11] >>> 14 00 0E 94 E1 21 0E 94 17 24 81 E0 80 93 71 06 FF 91 EF 91 BF 91 AF 91 9F 91 8F 91 7F 91 6F 91 5F 91 4F 91 3F 91 2F 91 0F 90 0F BE 0F 90 1F 90 18 95 A0 E0 B0 E0 EE E1 FE E1 0C 94 D8 1F 7C 01 FB 01 EA 01 C9 01 A2 80 B3 80 C4 80 D5 80 00 81 11 81 20 97 11 F4 CA E4 D6 E0 00 97 19 F4 CE 01 0E 94 46 22 B7 FC 04 C0 A8 16 B9 06 08 F4 C5 01 96 01 AC 01 BE 01 C7 01 0E 94 D4 1B CD B7 DE B7 EA E0 00 -2659 1739748929070 pro JtagIce3 [0x11] <<< 06 00 00 1E 40 -2659 1739748929071 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929071 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929076 pro JtagIce3 [0x11] >>> 14 00 0C 94 F4 1F 1F 92 0F 92 0F B6 0F 92 11 24 2F 93 3F 93 4F 93 5F 93 6F 93 7F 93 8F 93 9F 93 AF 93 BF 93 EF 93 FF 93 F8 94 10 92 72 06 0E 94 09 23 FF 91 EF 91 BF 91 AF 91 9F 91 8F 91 7F 91 6F 91 5F 91 4F 91 3F 91 2F 91 0F 90 0F BE 0F 90 1F 90 18 95 CF 93 FC 01 C6 2F 90 81 99 23 81 F0 31 96 20 E0 30 E0 8F E1 82 9F B0 01 83 9F 70 0D 11 24 9B 01 29 0F 31 1D 91 91 91 11 F5 CF 02 C0 20 E0 00 -2659 1739748929076 pro JtagIce3 [0x11] <<< 06 00 00 1E 80 -2659 1739748929077 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929077 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929083 pro JtagIce3 [0x11] >>> 14 00 30 E0 64 2F 70 E0 6C 1B 71 09 6F 5F 7F 4F C9 01 0E 94 1C 21 8C 0F CF 91 08 95 80 E0 0E 94 72 23 80 E0 0E 94 79 23 81 E0 0E 94 80 23 80 E0 0E 94 87 23 80 E0 0E 94 6B 23 8F E1 9E E4 01 97 F1 F7 00 C0 00 00 85 B7 80 66 85 BF 8F 7D 85 BF 83 B7 81 7F 84 60 83 BF 83 B7 81 60 83 BF 78 94 88 95 08 95 99 0F 00 08 55 0F AA 0B E0 E8 FE EF 16 16 17 06 E8 07 F9 07 C0 F0 12 16 13 06 E4 07 F5 07 00 -2659 1739748929083 pro JtagIce3 [0x11] <<< 06 00 00 1E C0 -2659 1739748929084 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929084 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929089 pro JtagIce3 [0x11] >>> 14 00 98 F0 62 1B 73 0B 84 0B 95 0B 39 F4 0A 26 61 F0 23 2B 24 2B 25 2B 21 F4 08 95 0A 26 09 F4 A1 40 A6 95 8F EF 81 1D 81 1D 08 95 A1 E2 1A 2E AA 1B BB 1B FD 01 0D C0 AA 1F BB 1F EE 1F FF 1F A2 17 B3 07 E4 07 F5 07 20 F0 A2 1B B3 0B E4 0B F5 0B 66 1F 77 1F 88 1F 99 1F 1A 94 69 F7 60 95 70 95 80 95 90 95 9B 01 AC 01 BD 01 CF 01 08 95 57 FD 90 58 44 0F 55 1F 59 F0 5F 3F 71 F0 47 95 88 0F 00 -2659 1739748929089 pro JtagIce3 [0x11] <<< 06 00 00 1F 00 -2659 1739748929090 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929090 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929096 pro JtagIce3 [0x11] >>> 14 00 97 FB 99 1F 61 F0 9F 3F 79 F0 87 95 08 95 12 16 13 06 14 06 55 1F F2 CF 46 95 F1 DF 08 C0 16 16 17 06 18 06 99 1F F1 CF 86 95 71 05 61 05 08 94 08 95 0F 93 1F 93 CF 93 DF 93 8C 01 0E 94 3D 23 C2 E0 D0 E0 8F EC 97 E0 01 97 F1 F7 00 C0 00 00 0C 17 1D 07 40 F0 88 E2 0E 94 58 21 21 96 82 FF F1 CF 81 E0 01 C0 80 E0 DF 91 CF 91 1F 91 0F 91 08 95 CF 93 DF 93 EC 01 90 E0 E9 2F F0 E0 EE 0F 00 -2659 1739748929096 pro JtagIce3 [0x11] <<< 06 00 00 1F 40 -2659 1739748929097 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929097 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929102 pro JtagIce3 [0x11] >>> 14 00 FF 1F EA 5F F9 4F 80 81 81 11 02 C0 81 81 0E C0 A8 81 B9 81 2C 91 82 13 05 C0 91 81 11 96 B9 83 A8 83 01 C0 9F 5F 9B 30 40 F3 89 2F DF 91 CF 91 08 95 FA 01 60 38 71 05 CC F0 62 38 71 05 1C F0 63 38 71 05 99 F4 A0 81 B1 81 9D 01 2C 5F 3F 4F 31 83 20 83 4D 91 5D 91 6D 91 7C 91 FC 01 40 83 51 83 62 83 73 83 81 E0 90 E0 08 95 80 E0 90 E0 08 95 97 FB 10 F8 16 94 00 08 0F 93 08 30 98 F0 00 -2659 1739748929102 pro JtagIce3 [0x11] <<< 06 00 00 1F 80 -2659 1739748929103 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929103 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929109 pro JtagIce3 [0x11] >>> 14 00 08 50 23 2F 34 2F 45 2F 56 2F 67 2F 78 2F 89 2F 90 2D F4 CF 05 94 97 95 87 95 77 95 67 95 57 95 47 95 37 95 27 95 0A 95 AA F7 0F 91 08 95 A0 E0 B0 E0 ED E9 FF E1 0C 94 DA 1F 6C 01 EB 01 8A 01 7B 01 E4 0E F5 1E CE 15 DF 05 41 F0 89 91 B6 01 08 2E 00 0C 99 0B 0E 94 B4 19 F5 CF C8 01 CD B7 DE B7 E8 E0 0C 94 F6 1F 80 93 BB 00 84 E8 80 93 BC 00 8B EF EC EB F0 E0 08 C0 AF EC B7 E0 11 97 00 -2659 1739748929109 pro JtagIce3 [0x11] <<< 06 00 00 1F C0 -2659 1739748929110 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929110 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929115 pro JtagIce3 [0x11] >>> 14 00 F1 F7 00 C0 00 00 81 50 19 F0 90 81 99 23 AC F7 90 91 B9 00 98 7F 81 E0 98 32 09 F4 80 E0 08 95 2F 92 3F 92 4F 92 5F 92 6F 92 7F 92 8F 92 9F 92 AF 92 BF 92 CF 92 DF 92 EF 92 FF 92 0F 93 1F 93 CF 93 DF 93 CD B7 DE B7 CA 1B DB 0B 0F B6 F8 94 DE BF 0F BE CD BF 09 94 2A 88 39 88 48 88 5F 84 6E 84 7D 84 8C 84 9B 84 AA 84 B9 84 C8 84 DF 80 EE 80 FD 80 0C 81 1B 81 AA 81 B9 81 CE 0F D1 1D 00 -2659 1739748929115 pro JtagIce3 [0x11] <<< 06 00 00 20 00 -2659 1739748929116 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929116 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929122 pro JtagIce3 [0x11] >>> 14 00 0F B6 F8 94 DE BF 0F BE CD BF ED 01 08 95 81 11 04 C0 80 E4 80 93 7C 00 0E C0 8E 30 21 F4 8E E4 80 93 7C 00 08 C0 EC E7 F0 E0 90 81 90 7F 90 83 90 81 89 2B 80 83 EA E7 F0 E0 80 81 80 64 80 83 08 95 0F 93 1F 93 CF 93 DF 93 66 23 71 F0 EC 01 61 50 06 2F 10 E0 0F 5F 1F 4F 08 0F 19 1F 89 91 0E 94 2D 23 C0 17 D1 07 D1 F7 DF 91 CF 91 1F 91 0F 91 08 95 81 E0 0E 94 5D 23 2F EF 80 E7 92 E0 00 -2659 1739748929122 pro JtagIce3 [0x11] <<< 06 00 00 20 40 -2659 1739748929123 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929123 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929128 pro JtagIce3 [0x11] >>> 14 00 21 50 80 40 90 40 E1 F7 00 C0 00 00 80 E0 0E 94 5D 23 2F EF 80 E7 92 E0 21 50 80 40 90 40 E1 F7 00 C0 00 00 08 95 80 93 AE 00 20 E0 ED EA F0 E0 0D C0 8F EC 97 E0 01 97 F1 F7 00 C0 00 00 2F 5F 82 2F 90 E0 01 96 8B 3F 91 05 1C F4 80 81 88 23 84 F7 80 91 AE 00 08 95 A2 E0 B0 E0 E2 E7 F0 E2 0C 94 DE 1F 8C 01 5A 83 49 83 AE 01 4F 5F 5F 4F 0E 94 5F 1B F8 01 20 81 24 FF 02 C0 8F EF 9F EF 00 -2659 1739748929128 pro JtagIce3 [0x11] <<< 06 00 00 20 80 -2659 1739748929129 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929129 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929135 pro JtagIce3 [0x11] >>> 14 00 22 96 E4 E0 0C 94 FA 1F CF 93 C0 E0 0D C0 8F EC 97 E0 01 97 F1 F7 00 C0 00 00 CF 5F 8C 2F 90 E0 01 96 8B 3F 91 05 2C F4 88 E2 0E 94 58 21 83 FF EE CF CF 91 08 95 CF 93 C0 E0 0D C0 8F EC 97 E0 01 97 F1 F7 00 C0 00 00 CF 5F 8C 2F 90 E0 01 96 8B 3F 91 05 2C F4 87 E2 0E 94 58 21 88 23 74 F7 CF 91 08 95 CF 93 DF 93 D8 2F C6 2F 81 E0 0E 94 79 23 8D 2F 80 68 0E 94 53 20 8C 2F 0E 94 53 20 00 -2659 1739748929135 pro JtagIce3 [0x11] <<< 06 00 00 20 C0 -2659 1739748929136 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929136 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929141 pro JtagIce3 [0x11] >>> 14 00 C8 2F 80 E0 0E 94 79 23 8C 2F DF 91 CF 91 08 95 0E 94 D8 23 8E E0 0E 94 38 22 8E E0 0E 94 38 22 8E E0 0E 94 38 22 90 93 5E 06 80 93 5D 06 0E 94 D2 23 80 91 5D 06 90 91 5E 06 08 95 84 EC 80 93 BC 00 8B EF EC EB F0 E0 08 C0 AF EC B7 E0 11 97 F1 F7 00 C0 00 00 81 50 19 F0 90 81 99 23 AC F7 80 91 BB 00 08 95 84 E8 80 93 BC 00 8B EF EC EB F0 E0 08 C0 AF EC B7 E0 11 97 F1 F7 00 C0 00 00 00 -2659 1739748929141 pro JtagIce3 [0x11] <<< 06 00 00 21 00 -2659 1739748929142 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929142 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929148 pro JtagIce3 [0x11] >>> 14 00 81 50 19 F0 90 81 99 23 AC F7 80 91 BB 00 08 95 82 E9 94 E0 0E 94 E1 21 0E 94 EE 22 85 E9 94 E0 0E 94 E1 21 84 E0 0E 94 0E 22 88 E9 94 E0 0E 94 E1 21 0E 94 9B 20 08 95 AA 1B BB 1B 51 E1 07 C0 AA 1F BB 1F A6 17 B7 07 10 F0 A6 1B B7 0B 88 1F 99 1F 5A 95 A9 F7 80 95 90 95 BC 01 CD 01 08 95 97 FB 07 2E 16 F4 00 94 07 D0 77 FD 09 D0 0E 94 1C 21 07 FC 05 D0 3E F4 90 95 81 95 9F 4F 08 95 00 -2659 1739748929148 pro JtagIce3 [0x11] <<< 06 00 00 21 40 -2659 1739748929149 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929149 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929154 pro JtagIce3 [0x11] >>> 14 00 70 95 61 95 7F 4F 08 95 A0 E0 B0 E0 EA E4 F1 E2 0C 94 E0 1F 9E 01 25 5F 3F 4F 49 85 5A 85 6F 81 78 85 8D 81 9E 81 0E 94 E0 1A E2 E0 0C 94 FC 1F CF 93 C8 2F 81 E0 0E 94 79 23 8C 2F 0E 94 53 20 8F EF 90 E0 0E 94 FC 23 C8 2F 80 E0 0E 94 79 23 8C 2F CF 91 08 95 84 E9 80 93 BC 00 8B EF EC EB F0 E0 08 C0 AF EC B7 E0 11 97 F1 F7 00 C0 00 00 81 50 19 F0 90 81 94 FF F5 CF 08 95 CF 93 C8 2F 00 -2659 1739748929154 pro JtagIce3 [0x11] <<< 06 00 00 21 80 -2659 1739748929155 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929155 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929161 pro JtagIce3 [0x11] >>> 14 00 40 E4 50 E0 60 E2 70 E0 81 EF 94 E0 0E 94 1B 23 40 E4 61 EF 74 E0 8C 2F 0E 94 4B 1A CF 91 08 95 09 2E 03 94 00 0C 11 F4 88 23 52 F0 BB 0F 40 F4 BF 2B 11 F4 60 FF 04 C0 6F 5F 7F 4F 8F 4F 9F 4F 08 95 FC 01 10 82 8F EF 81 83 82 83 13 82 14 82 4C E3 50 E0 60 E2 70 E0 CF 01 05 96 0E 94 1B 23 08 95 CF 93 DF 93 0F 92 CD B7 DE B7 49 83 21 E0 AE 01 4F 5F 5F 4F 0E 94 76 1C 0F 90 DF 91 CF 91 00 -2659 1739748929161 pro JtagIce3 [0x11] <<< 06 00 00 21 C0 -2659 1739748929162 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929162 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929167 pro JtagIce3 [0x11] >>> 14 00 08 95 0E 94 1C 22 80 93 6A 06 88 23 49 F0 81 50 80 93 69 06 0E 94 00 23 80 91 6A 06 0E 94 7E 21 08 95 60 95 70 95 80 95 90 95 30 95 40 95 50 95 21 95 3F 4F 4F 4F 5F 4F 6F 4F 7F 4F 8F 4F 9F 4F 08 95 CF 93 DF 93 EC 01 88 81 88 23 31 F0 21 96 0E 94 2D 23 89 91 81 11 FB CF DF 91 CF 91 08 95 CF 93 DF 93 0F 92 CD B7 DE B7 AE 01 4F 5F 5F 4F 0E 94 F8 23 89 81 0F 90 DF 91 CF 91 08 95 CF 93 00 -2659 1739748929167 pro JtagIce3 [0x11] <<< 06 00 00 22 00 -2659 1739748929168 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929168 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929174 pro JtagIce3 [0x11] >>> 14 00 DF 93 90 E4 89 9F E0 01 11 24 8D 2F 0E 94 53 20 8C 2F 0E 94 53 20 DF 91 CF 91 08 95 CF 93 C8 2F 81 E0 0E 94 58 21 6C 2F 6C 71 83 7E 68 2B 81 E0 0E 94 B2 20 CF 91 08 95 CF 93 DF 93 C1 EF D4 E0 18 82 41 E0 BE 01 80 E0 0E 94 34 1D 88 81 DF 91 CF 91 08 95 F8 94 A8 95 E0 E6 F0 E0 80 81 88 61 80 83 85 E0 80 83 80 81 80 64 80 83 78 94 08 95 0E 94 07 20 0E 94 E9 23 88 23 E1 F3 0E 94 9C 23 00 -2659 1739748929174 pro JtagIce3 [0x11] <<< 06 00 00 22 40 -2659 1739748929182 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929182 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929187 pro JtagIce3 [0x11] >>> 14 00 EA E7 F0 E0 20 81 20 61 20 83 08 95 FC 01 AF 01 4F 5F 5F 4F 20 81 22 23 11 F0 FA 01 F8 CF 9F 01 28 1B 39 0B C9 01 08 95 68 94 01 C0 E8 94 8F 92 9F 92 CF 93 DF 93 0E 94 76 18 DF 91 CF 91 9F 90 8F 90 08 95 CF 93 DF 93 EC 01 0E 94 1C 22 68 2F CE 01 0E 94 22 1B CE 01 DF 91 CF 91 08 95 22 98 2A 9A E8 E6 F0 E0 80 81 81 60 80 83 EB E6 F0 E0 80 81 84 60 80 83 08 95 E3 E4 F6 E0 80 E8 80 83 00 -2659 1739748929187 pro JtagIce3 [0x11] <<< 06 00 00 22 80 -2659 1739748929188 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929188 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929194 pro JtagIce3 [0x11] >>> 14 00 81 83 82 83 23 E0 AF 01 63 E1 88 E6 0E 94 76 1C 08 95 10 92 C5 00 83 E3 80 93 C4 00 88 E0 80 93 C1 00 86 E0 80 93 C2 00 08 95 53 98 5B 9A E9 E6 F0 E0 80 81 88 60 80 83 80 81 8B 7F 80 83 E9 9A 08 95 52 98 5A 9A E9 E6 F0 E0 80 81 82 60 80 83 80 81 8E 7F 80 83 E8 9A 08 95 FC 01 2E 2F 9F 2F 81 91 86 17 21 F0 81 11 F9 CF 90 E0 08 95 82 2F 08 95 00 24 A7 FD 00 94 2A 17 30 05 40 05 50 05 00 -2659 1739748929194 pro JtagIce3 [0x11] <<< 06 00 00 22 C0 -2659 1739748929195 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929195 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929200 pro JtagIce3 [0x11] >>> 14 00 60 05 70 05 80 05 90 05 08 95 EC 01 0E 94 1C 24 0E 94 1B 24 CE 01 0E 94 1D 24 CE 01 0E 94 15 24 FB 01 DC 01 48 0F 59 1F A4 17 B5 07 19 F0 21 91 2D 93 FA CF 08 95 80 E4 80 93 7C 00 10 92 7B 00 81 E8 80 93 7A 00 80 E0 08 95 6D E5 8A E5 0E 94 B2 20 6C E7 8C E5 0E 94 B2 20 08 95 65 E5 8A E5 0E 94 B2 20 60 E7 8C E5 0E 94 B2 20 08 95 10 92 B9 00 88 E4 80 93 B8 00 84 E0 80 93 BC 00 08 95 00 -2659 1739748929200 pro JtagIce3 [0x11] <<< 06 00 00 23 00 -2659 1739748929201 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929201 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929207 pro JtagIce3 [0x11] >>> 14 00 80 93 43 06 41 E0 63 E4 76 E0 80 E0 0E 94 4B 1A 08 95 F8 94 E0 E6 F0 E0 80 81 88 61 80 83 10 82 78 94 08 95 8F 93 F8 94 1A 9B 03 C0 81 E0 80 93 70 06 8F 91 18 95 FC 01 48 0F 59 1F E4 17 F5 07 11 F0 61 93 FB CF 08 95 9C 01 21 56 31 09 2A 31 31 05 10 F4 8F 75 99 27 08 95 E0 EC F0 E0 90 81 95 FF FD CF 80 93 C6 00 08 95 0E 94 E5 22 8C E0 0E 94 0E 22 0E 94 9B 20 08 95 0E 94 EE 22 80 E1 00 -2659 1739748929207 pro JtagIce3 [0x11] <<< 06 00 00 23 40 -2659 1739748929208 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929208 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929213 pro JtagIce3 [0x11] >>> 14 00 0E 94 0E 22 0E 94 9B 20 08 95 39 9A 6B 9A 38 98 40 9A 80 E5 80 93 AC 00 08 95 FC 01 DB 01 2D 91 BD 01 21 93 21 11 FA CF 08 95 9C 01 21 54 31 09 2A 31 31 05 08 F4 80 62 08 95 3A 9A 88 23 11 F0 42 9A 08 95 42 98 08 95 54 9A 88 23 11 F0 5C 9A 08 95 5C 98 08 95 3B 9A 88 23 11 F0 43 9A 08 95 43 98 08 95 20 9A 81 11 02 C0 28 9A 08 95 28 98 08 95 6A 9A 81 11 02 C0 72 9A 08 95 72 98 08 95 00 -2659 1739748929213 pro JtagIce3 [0x11] <<< 06 00 00 23 80 -2659 1739748929214 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929214 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929220 pro JtagIce3 [0x11] >>> 14 00 55 9A 88 23 11 F0 5D 9A 08 95 5D 98 08 95 68 9A 88 23 11 F0 70 9A 08 95 70 98 08 95 26 2F BA 01 AC 01 83 E5 0E 94 22 18 08 95 27 E0 AC 01 66 E0 88 E6 0E 94 17 19 08 95 80 91 78 00 20 91 79 00 90 E0 92 2B 08 95 50 58 BB 27 AA 27 0E 94 03 17 0C 94 90 21 0E 94 05 1D 68 94 B1 11 0C 94 C0 23 08 95 00 24 0A 94 16 16 17 06 18 06 09 06 08 95 00 24 0A 94 12 16 13 06 14 06 05 06 08 95 E8 94 00 -2659 1739748929220 pro JtagIce3 [0x11] <<< 06 00 00 23 C0 -2659 1739748929221 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929221 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929226 pro JtagIce3 [0x11] >>> 14 00 BB 27 66 27 77 27 CB 01 97 F9 08 95 4A E0 64 E0 88 E6 0E 94 B1 21 08 95 42 E0 61 E0 88 E6 0E 94 B1 21 08 95 EA E7 F0 E0 80 81 8F 77 80 83 08 95 EA E7 F0 E0 80 81 80 68 80 83 08 95 97 F9 9F 67 80 E8 70 E0 60 E0 08 95 68 2F 88 E6 0E 94 F0 21 08 95 80 91 7A 00 82 95 81 70 08 95 0E 94 B1 1E 08 F4 81 E0 08 95 0E 94 B1 1E 08 F4 8F EF 08 95 21 E0 0E 94 17 19 08 95 8F EF 0E 94 53 20 08 95 00 -2659 1739748929226 pro JtagIce3 [0x11] <<< 06 00 00 24 00 -2659 1739748929227 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929227 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929233 pro JtagIce3 [0x11] >>> 14 00 80 E0 0E 94 E4 23 08 95 81 E0 0E 94 E4 23 08 95 0E 94 55 15 0C 94 90 21 0E 94 30 16 0C 94 90 21 9F EF 80 EC 08 95 0C 94 00 00 0E 94 A9 00 08 95 08 95 08 95 08 95 08 95 08 95 08 95 09 09 09 09 4D 49 4E 55 54 45 20 49 4E 54 45 52 52 55 50 54 0A 00 2D 2D 2D 2D 20 53 54 41 52 54 49 4E 47 20 2D 2D 2D 2D 0A 00 53 65 74 20 75 70 20 41 56 52 20 69 6E 74 65 72 72 75 70 74 73 0A 00 53 65 74 00 -2659 1739748929233 pro JtagIce3 [0x11] <<< 06 00 00 24 40 -2659 1739748929234 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929234 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929240 pro JtagIce3 [0x11] >>> 14 00 20 75 70 20 52 54 43 20 69 6E 74 65 72 72 75 70 74 73 0A 00 49 6E 69 74 69 61 6C 69 7A 65 64 20 52 46 4D 36 39 0A 00 53 65 74 20 75 70 20 6C 61 73 74 20 70 61 67 65 20 76 61 6C 75 65 20 66 6F 72 20 53 50 49 20 66 6C 61 73 68 0A 00 47 6F 74 20 6E 75 67 67 65 74 20 64 61 74 61 20 66 72 6F 6D 20 52 46 49 44 0A 00 46 61 69 6C 65 64 20 74 6F 20 67 65 74 20 74 69 6D 65 20 0A 00 53 75 63 00 -2659 1739748929240 pro JtagIce3 [0x11] <<< 06 00 00 24 80 -2659 1739748929241 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929241 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929246 pro JtagIce3 [0x11] >>> 14 00 63 65 73 73 20 69 6E 20 67 65 74 20 74 69 6D 65 20 0A 00 49 6E 20 6D 69 6E 75 74 65 20 69 6E 64 65 78 0A 00 54 58 20 44 41 54 41 20 53 65 6E 74 0A 00 20 20 20 20 20 20 20 54 58 20 44 41 54 41 20 6E 6F 74 20 73 65 6E 74 2C 20 77 72 69 74 69 6E 67 20 74 6F 20 53 50 49 0A 00 20 20 20 20 20 20 20 53 50 49 20 6E 6F 74 20 73 65 6E 74 0A 00 54 58 20 44 41 54 41 20 46 72 6F 6D 20 53 50 49 00 -2659 1739748929246 pro JtagIce3 [0x11] <<< 06 00 00 24 C0 -2659 1739748929247 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929247 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929253 pro JtagIce3 [0x11] >>> 14 00 20 4D 65 6D 6F 72 79 0A 00 20 20 20 20 00 4C 45 4E 2C 54 4F 2C 46 52 4F 4D 2C 44 54 59 50 45 2C 46 4C 41 47 53 0A 00 0A 00 57 48 45 45 4C 5F 43 4F 55 4E 54 53 5F 49 4E 5F 47 45 4E 5F 4D 45 53 53 41 47 45 5F 31 0A 00 31 0A 00 32 0A 00 33 0A 00 52 58 20 44 41 54 41 0A 00 20 20 20 20 20 20 20 52 58 20 44 41 54 41 20 53 55 43 43 45 53 53 0A 00 20 20 20 20 20 20 20 52 58 20 44 41 54 41 00 -2659 1739748929253 pro JtagIce3 [0x11] <<< 06 00 00 25 00 -2659 1739748929253 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929253 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929259 pro JtagIce3 [0x11] >>> 14 00 20 46 41 49 4C 45 44 0A 00 20 20 20 20 20 20 20 52 58 20 44 41 54 41 20 41 4E 4F 54 48 45 52 20 45 52 52 4F 52 0A 00 25 75 2F 25 30 32 75 2F 25 30 32 75 20 25 75 3A 25 30 32 75 3A 25 30 32 75 00 0A 00 68 07 6C 09 4C 83 6A 90 74 A0 7A C0 00 80 68 88 00 84 6C 82 00 81 49 4E 46 00 69 6E 66 00 4E 41 4E 00 6E 61 6E 00 49 4E 46 00 69 6E 66 00 4E 41 4E 00 6E 61 6E 00 28 6E 75 6C 6C 29 00 00 -2659 1739748929259 pro JtagIce3 [0x11] <<< 06 00 00 25 40 -2659 1739748929260 pro JtagIce3 [0x11] >>> 06 00 -2659 1739748929260 pro JtagIce3 [0x11] <<< 14 00 80 20 -2659 1739748929265 pro JtagIce3 [0x11] >>> 14 00 28 6E 69 6C 29 00 0A 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 00 -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Post:SendOperation -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Return Value -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB None -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Return End - -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Pre:endOfOperations -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Payload -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB null -2659 1739748929266 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Payload End -2659 1739748929266 pro JtagIce3 [0x11] <<< 11 01 01 -2659 1739748929268 pro JtagIce3 [0x11] >>> 11 00 -2659 1739748929269 pro JtagIce3 [0x01] <<< 11 00 00 -2659 1739748929269 pro JtagIce3 [0x01] >>> 80 00 -2659 1739748929269 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Post:endOfOperations -2659 1739748929269 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Return Value -2659 1739748929269 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB None -2659 1739748929269 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Return End - -2659 1739748929270 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Pre:SendOperation -2659 1739748929270 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Payload -2659 1739748929270 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB OperationInfo: Values: -2659 1739748929270 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB OperationInfo: Type = releasefromreset, Mask = 00000000, Erase = false, Production Mode = true -2659 1739748929270 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Payload End -2659 1739748929270 pro JtagIce3 [0x01] <<< 11 00 00 -2659 1739748929271 pro JtagIce3 [0x01] >>> 80 00 -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Post:SendOperation -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Return Value -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB None -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_PROGRAM_INT_LOG_ATmega328PB Return End -2659 1739748929271 GEN4_CONNECT_DIAGNOSTICS:MPLABCommTool is null - -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:GetFirmwareInfo -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG null -2659 1739748929271 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2659 1739748929271 NativeController::GetFirmwareInfo entry -2659 1739748929271 pro JtagIce3 [0x01] <<< 02 00 00 00 01 -2659 1739748929272 pro JtagIce3 [0x01] >>> 84 01 00 00 -2659 1739748929272 NativeController::getFirmwareVersion entry -2659 1739748929272 pro JtagIce3 [0x01] <<< 02 00 00 01 01 -2659 1739748929273 pro JtagIce3 [0x01] >>> 84 01 01 00 -2659 1739748929273 pro JtagIce3 [0x01] <<< 02 00 00 02 01 -2659 1739748929274 pro JtagIce3 [0x01] >>> 84 01 2D 00 -2659 1739748929274 pro JtagIce3 [0x01] <<< 02 00 00 03 02 -2659 1739748929275 pro JtagIce3 [0x01] >>> 84 01 07 00 00 -2659 1739748929275 NativeController::getFirmwareVersion exit -2659 1739748929275 pro JtagIce3 [0x01] <<< 02 00 00 09 01 -2659 1739748929276 pro JtagIce3 [0x01] >>> 84 01 00 11 -2659 1739748929276 NativeController::tryGetFPGAVersion entry -2659 1739748929276 pro JtagIce3 [0x01] <<< 02 00 00 10 01 -2659 1739748929277 pro JtagIce3 [0x01] >>> 84 01 00 11 -2659 1739748929277 pro JtagIce3 [0x01] <<< 02 00 00 11 01 -2659 1739748929278 pro JtagIce3 [0x01] >>> 84 01 00 11 -2659 1739748929278 pro JtagIce3 [0x01] <<< 02 00 00 12 01 -2659 1739748929279 pro JtagIce3 [0x01] >>> 84 01 00 11 -2659 1739748929279 NativeController::tryGetFPGAVersion exit -2659 1739748929279 NativeController::tryGetFPGAVersion exit with exception No value present -2659 1739748929279 pro JtagIce3 [0x01] <<< 02 00 00 06 01 -2659 1739748929280 pro JtagIce3 [0x01] >>> 84 01 05 00 -2659 1739748929280 pro JtagIce3 [0x01] <<< 02 00 00 07 01 -2659 1739748929281 pro JtagIce3 [0x01] >>> 84 01 05 00 -2659 1739748929281 pro JtagIce3 [0x01] <<< 02 00 00 0A 01 -2659 1739748929282 pro JtagIce3 [0x01] >>> 84 01 00 11 -2659 1739748929282 NativeController::GetFirmwareInfo exit -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:GetFirmwareInfo -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG FirmwareInfo: Values: -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG FirmwareInfo: boot = false, bootVer = 5.5.0 (0x05.0x05.0x00), apVer = 1.45.7 (0x01.0x2d.0x07), fpgaVer = null, scriptVer = null, macAddress = , devID = 0, devID1 = 0, devSN0 = 0, devSN1 = 0, serialNumber = null, appCommitID = null, scriptCommitID = null, PCB_ID = 0 -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End - -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:SetPowerInfo -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG PowerInfo: Values: -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG PowerInfo: shotDownSystem = true, isToolPower = false, voltage = 0.000000, useVppFirst = false, useLowVoltageProgramming = true, useMaintainActivePower = false -2659 1739748929282 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2659 1739748929282 NativeController::GetVoltageInfo entry -2659 1739748929282 pro JtagIce3 [0x01] <<< 02 00 01 00 02 -2659 1739748929283 pro JtagIce3 [0x01] >>> 84 01 C1 0E 00 -2659 1739748929283 pro JtagIce3 [0x01] <<< 02 00 01 20 02 -2659 1739748929284 pro JtagIce3 [0x01] >>> 84 01 00 00 11 -2659 1739748929284 NativeController::GetVoltageInfo TSUP exit with exception + The requested command is not supported. (17) -2659 1739748929284 pro JtagIce3 [0x01] <<< 02 00 01 02 02 -2659 1739748929285 pro JtagIce3 [0x01] >>> 84 01 00 00 11 -2659 1739748929285 NativeController::GetVoltageInfo VUSB exit with exception + The requested command is not supported. (17) -2659 1739748929285 NativeController::GetVoltageInfo exit -2659 1739748929285 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:SetPowerInfo -2659 1739748929285 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2659 1739748929285 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG none -2659 1739748929285 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End - -2659 1739748929285 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:Disconnect -2659 1739748929285 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2659 1739748929285 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2659 1739748929285 NativeController::Disconnect entry -2659 1739748929285 pro JtagIce3 [0x01] <<< 11 00 00 -2659 1739748929286 pro JtagIce3 [0x01] >>> 80 00 -2659 1739748929286 NativeController::Disconnect exit -2659 1739748929286 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:Disconnect -2659 1739748929286 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2659 1739748929286 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG none -2659 1739748929286 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End -2659 1739748929286 GEN4_CONNECT_DIAGNOSTICS:Removing plug and play observer com.microchip.mplab.mdbcore.RI4Tool.RI4ToolBase$RI4PlugNPlayObserver@31792b96 -2659 1739748929286 GEN4_CONNECT_DIAGNOSTICS:Begin PlugNPlayObservers list dump: -2659 1739748929286 GEN4_CONNECT_DIAGNOSTICS:End PlugNPlayObservers list dump: -2659 1739748929387 GEN4_CONNECT_DIAGNOSTICS:Calling RIDbgToolCom.Disconnect -2659 1739748929387 GEN4_CONNECT_DIAGNOSTICS:Calling MPLABCommTool.Detach to remove tool from plug and play list -2659 1739748929387 GEN4_CONNECT_DIAGNOSTICS:Calling RIDbgToolCom.DisconnectFromMPlabComm -2659 1739748929387 GEN4_CONNECT_DIAGNOSTICS:Calling MPLABCommTool.Disconnect -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:MPLABCommTool is NOT null -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:AttachedToolPID = 2141, AttachedToolVID = 3eb -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:transport type = USB -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:AttachedToolPID = 2141, AttachedToolVID = 3eb -2672 1739748994316 com.microchip.mplab.mdbcore.RealICETool.RIDbgToolCom -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:Before MPLABCommTool.Connect() -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:After MPLABCommTool.Connect() -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:MPLABCommTool.Connect() returned MPLABCOMM_NO_ERROR -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:Attaching to MPLABCommTool plugnplay -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:Adding new plug and play observer com.microchip.mplab.mdbcore.RI4Tool.RI4ToolBase$RI4PlugNPlayObserver@398b7b44 -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:Begin PlugNPlayObservers list dump: -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:com.microchip.mplab.mdbcore.RI4Tool.RI4ToolBase$RI4PlugNPlayObserver@398b7b44 -2672 1739748994316 GEN4_CONNECT_DIAGNOSTICS:End PlugNPlayObservers list dump: -2672 1739748994317 GEN4_CONNECT_DIAGNOSTICS:Registering for alternate PNP notifications. CommPnPCriteria.cPIDList = [2177, 2179, 217a, 2142, 2142], CommPnPCriteria.cSerialNumber = j42700011280 - -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Pre:init -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: Values: -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: pcAddress = 7fffffffffffffff, Vpp = 5.00, useRowEraseIfVoltageIsLow = false, voltageBelowWhichUseRowErase = 0.00, deviceName = ATmega328PB, programmerType = -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: MemInfo values: -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = ffff, exists = true, startAddr = 00000000, endAddr = 00007fff, rowSize = 0080, rowEraseSize = 0080, addrInc = 0001, widthProgram = 0001 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 00ff, exists = true, startAddr = 00820000, endAddr = 00820002, rowSize = 0001, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0080, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 00ff, exists = true, startAddr = 00000000, endAddr = 000003ff, rowSize = 0004, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 7fffffff, exists = true, startAddr = 00840000, endAddr = 00840002, rowSize = 0001, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB DeviceInfo: CfgRequiredBitsMask Values: -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Address = 00820000, Mask = 000000ff -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Address = 00820001, Mask = 000000ff -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Address = 00820002, Mask = 0000000f -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Address = 00830000, Mask = 0000003f -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB BasicInfo: Values: -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload End -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Post:init -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return Value -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB none -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return End - -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Pre:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB RI4DebugInterface -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload End -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Post:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return Value -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB com.microchip.mplab.libs.atmelice.implementations.DebugInterface@4dbf686c -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return End - -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Pre:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB RI4ProgramInterface -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload End -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Post:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return Value -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB com.microchip.mplab.libs.atmelice.implementations.ProgramInterface@2f8c7bc4 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return End - -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Pre:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB RI4ConnectInterface -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload End -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Post:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return Value -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB com.microchip.mplab.libs.atmelice.implementations.ConnectInterface@1ca60d5e -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return End - -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Pre:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB RI4ControllerDiagnosticsInterface -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload End -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Post:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return Value -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB com.microchip.mplab.libs.atmelice.implementations.UnimplementedDiagnostics@4edc2951 -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return End - -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Pre:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB ProgrammerToGo -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload End -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Post:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return Value -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB null -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return End - -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Pre:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Status -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Payload End -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Post:GetInterfaceProvider -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return Value -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB null -2672 1739748994334 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATmega328PB Return End - -2672 1739748994335 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:EstablishCommunincations -2672 1739748994335 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994335 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG com.microchip.mplab.mdbcore.AtmelIceScripting.AIceScriptingCom@7816d4ee -2672 1739748994335 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994335 NativeController::EstablishCommunincations entry -2672 1739748994335 pro JtagIce3 [0x00] <<< 00 00 00 -2672 1739748994336 pro JtagIce3 [0x00] >>> 81 00 00 01 11 12 13 14 -2672 1739748994337 pro JtagIce3 [0x01] <<< 10 00 -2672 1739748994337 pro JtagIce3 [0x01] >>> 80 00 -2672 1739748994338 pro JtagIce3 [0x00] <<< 00 00 03 -2672 1739748994338 pro JtagIce3 [0x00] >>> 81 00 01 04 05 06 07 -2672 1739748994339 pro JtagIce3 [0x01] <<< 02 00 01 20 02 -2672 1739748994339 pro JtagIce3 [0x01] >>> 84 01 00 00 11 -2672 1739748994340 NativeController::EstablishCommunincations exit -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:EstablishCommunincations -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG true -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End - -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:GetFirmwareInfo -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG null -2672 1739748994340 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994340 NativeController::GetFirmwareInfo entry -2672 1739748994340 pro JtagIce3 [0x01] <<< 02 00 00 00 01 -2672 1739748994340 pro JtagIce3 [0x01] >>> 84 01 00 00 -2672 1739748994340 NativeController::getFirmwareVersion entry -2672 1739748994341 pro JtagIce3 [0x01] <<< 02 00 00 01 01 -2672 1739748994341 pro JtagIce3 [0x01] >>> 84 01 01 00 -2672 1739748994341 pro JtagIce3 [0x01] <<< 02 00 00 02 01 -2672 1739748994342 pro JtagIce3 [0x01] >>> 84 01 2D 00 -2672 1739748994342 pro JtagIce3 [0x01] <<< 02 00 00 03 02 -2672 1739748994343 pro JtagIce3 [0x01] >>> 84 01 07 00 00 -2672 1739748994343 NativeController::getFirmwareVersion exit -2672 1739748994344 pro JtagIce3 [0x01] <<< 02 00 00 09 01 -2672 1739748994344 pro JtagIce3 [0x01] >>> 84 01 00 11 -2672 1739748994345 NativeController::tryGetFPGAVersion entry -2672 1739748994345 pro JtagIce3 [0x01] <<< 02 00 00 10 01 -2672 1739748994345 pro JtagIce3 [0x01] >>> 84 01 00 11 -2672 1739748994346 pro JtagIce3 [0x01] <<< 02 00 00 11 01 -2672 1739748994346 pro JtagIce3 [0x01] >>> 84 01 00 11 -2672 1739748994347 pro JtagIce3 [0x01] <<< 02 00 00 12 01 -2672 1739748994347 pro JtagIce3 [0x01] >>> 84 01 00 11 -2672 1739748994348 NativeController::tryGetFPGAVersion exit -2672 1739748994348 NativeController::tryGetFPGAVersion exit with exception No value present -2672 1739748994348 pro JtagIce3 [0x01] <<< 02 00 00 06 01 -2672 1739748994348 pro JtagIce3 [0x01] >>> 84 01 05 00 -2672 1739748994349 pro JtagIce3 [0x01] <<< 02 00 00 07 01 -2672 1739748994349 pro JtagIce3 [0x01] >>> 84 01 05 00 -2672 1739748994349 pro JtagIce3 [0x01] <<< 02 00 00 0A 01 -2672 1739748994350 pro JtagIce3 [0x01] >>> 84 01 00 11 -2672 1739748994351 NativeController::GetFirmwareInfo exit -2672 1739748994351 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:GetFirmwareInfo -2672 1739748994351 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2672 1739748994351 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG FirmwareInfo: Values: -2672 1739748994351 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG FirmwareInfo: boot = false, bootVer = 5.5.0 (0x05.0x05.0x00), apVer = 1.45.7 (0x01.0x2d.0x07), fpgaVer = null, scriptVer = null, macAddress = , devID = 0, devID1 = 0, devSN0 = 0, devSN1 = 0, serialNumber = null, appCommitID = null, scriptCommitID = null, PCB_ID = 0 -2672 1739748994351 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End -2672 1739748994351 GEN4_CONNECT_DIAGNOSTICS:ENTERING: com.microchip.mplab.mdbcore.RI4Tool.ConnectionHandler.CheckForFWUpdates() -2672 1739748994351 GEN4_CONNECT_DIAGNOSTICS:Created FirmwareUpdateHandler com.microchip.mplab.mdbcore.AtmelIceScripting.OperationHandlers.AIceScriptingFirmwareUpdateHandler@3488d273 - -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:SetUpdateFirmwareInfo -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG UpdateFirmwareInfo: Values: -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG UpdateFirmwareInfo: license = dCejLCt9ZV4fWdqYk3htQgdNYCC2nccSTvVdTD2oCjW3gRUtjikRtla11IiYo1wq, updateId = 2147483647 -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:SetUpdateFirmwareInfo -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG none -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End -2672 1739748994352 GEN4_CONNECT_DIAGNOSTICS:EXITING: com.microchip.mplab.mdbcore.RI4Tool.ConnectionHandler.CheckForFWUpdates() - -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:SetPowerInfo -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994352 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG PowerInfo: Values: -2672 1739748994353 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG PowerInfo: shotDownSystem = false, isToolPower = false, voltage = 5.000000, useVppFirst = false, useLowVoltageProgramming = true, useMaintainActivePower = false -2672 1739748994353 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994353 NativeController::GetVoltageInfo entry -2672 1739748994353 pro JtagIce3 [0x01] <<< 02 00 01 00 02 -2672 1739748994354 pro JtagIce3 [0x01] >>> 84 01 BC 0E 00 -2672 1739748994354 pro JtagIce3 [0x01] <<< 02 00 01 20 02 -2672 1739748994355 pro JtagIce3 [0x01] >>> 84 01 00 00 11 -2672 1739748994355 NativeController::GetVoltageInfo TSUP exit with exception + The requested command is not supported. (17) -2672 1739748994355 pro JtagIce3 [0x01] <<< 02 00 01 02 02 -2672 1739748994356 pro JtagIce3 [0x01] >>> 84 01 00 00 11 -2672 1739748994356 NativeController::GetVoltageInfo VUSB exit with exception + The requested command is not supported. (17) -2672 1739748994356 NativeController::GetVoltageInfo exit -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:SetPowerInfo -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG none -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End - -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:GetVoltageInfo -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG null -2672 1739748994356 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994356 NativeController::GetVoltageInfo entry -2672 1739748994356 pro JtagIce3 [0x01] <<< 02 00 01 00 02 -2672 1739748994357 pro JtagIce3 [0x01] >>> 84 01 BA 0E 00 -2672 1739748994357 pro JtagIce3 [0x01] <<< 02 00 01 20 02 -2672 1739748994358 pro JtagIce3 [0x01] >>> 84 01 00 00 11 -2672 1739748994358 NativeController::GetVoltageInfo TSUP exit with exception + The requested command is not supported. (17) -2672 1739748994358 pro JtagIce3 [0x01] <<< 02 00 01 02 02 -2672 1739748994359 pro JtagIce3 [0x01] >>> 84 01 00 00 11 -2672 1739748994359 NativeController::GetVoltageInfo VUSB exit with exception + The requested command is not supported. (17) -2672 1739748994359 NativeController::GetVoltageInfo exit -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:GetVoltageInfo -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG VoltagesInfo: Values: -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG VoltagesInfo: internalVdd = 0, internalVpp = 0, targetVdd = 0, targetVpp = -2147483648, vddSense = 3770, temp = 0, vddCurrentSense = 0, vddVoltageSense = -2147483648 -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End - -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:SetLEDBrightness -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG 5 -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:SetLEDBrightness -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG none -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End - -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:SetToolInfo -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG ToolInfo: Values: -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG ToolInfo: speedLevel = 1, PGCResistance = 4700, PGDResistance = 4700, PGCPullDir = PullDown, PGDPullDir = PullDown, ICSPSelected = Wire2 -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Post:SetToolInfo -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return Value -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG none -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Return End - -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Pre:GetTargetIDInfo -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG null -2672 1739748994359 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG Payload End -2672 1739748994359 NativeController::GetTargetIDInfo entry -2672 1739748994359 pro JtagIce3 [0x12] <<< 01 00 00 00 01 01 -2672 1739748994360 pro JtagIce3 [0x12] >>> 80 00 -2672 1739748994360 pro JtagIce3 [0x12] <<< 01 00 00 01 04 01 00 00 00 -2672 1739748994361 pro JtagIce3 [0x12] >>> 80 00 -2672 1739748994361 pro JtagIce3 [0x12] <<< 01 00 01 00 01 01 -2672 1739748994362 pro JtagIce3 [0x12] >>> 80 00 -2672 1739748994362 pro JtagIce3 [0x11] <<< 1D E8 03 -2672 1739748994363 pro JtagIce3 [0x11] >>> 1D 00 -2672 1739748994363 pro JtagIce3 [0x11] <<< 10 C8 64 19 20 00 53 03 AC 53 00 00 -2672 1739748994908 pro JtagIce3 [0x11] >>> 10 C0 diff --git a/avr_code/defines.c b/avr_code/defines.c index 1ddbd75..38603eb 100644 --- a/avr_code/defines.c +++ b/avr_code/defines.c @@ -1,12 +1,10 @@ #include "defines.h" - unsigned char DATA_BUFFER_65[65]; - uint8_t DATA_BUFFER_7[7]; -// uint8_t DATA_BUFFER_254[255]; - unsigned char DATA_BUFFER_20[20]; - ndef_message NDEF_MSG; - trimmed_string_struct TRIMMED_STRING; - identifier_results IDENTIFIER; - tx_rx_data_struct TX_DATA; - tx_rx_data_struct RX_DATA; - time_struct TIME; \ No newline at end of file +unsigned char DATA_BUFFER_65[65]; +uint8_t DATA_BUFFER_7[7]; +ndef_message NDEF_MSG; +trimmed_string_struct TRIMMED_STRING; +identifier_results IDENTIFIER; +tx_rx_data_struct TX_DATA; +tx_rx_data_struct RX_DATA; +time_struct TIME; \ No newline at end of file diff --git a/avr_code/defines.h b/avr_code/defines.h index cb7c361..dadb781 100644 --- a/avr_code/defines.h +++ b/avr_code/defines.h @@ -1,4 +1,4 @@ -/* +/* * File: defines.h * Author: thebears * @@ -6,33 +6,43 @@ */ #ifndef DEFINES_H -#define DEFINES_H +#define DEFINES_H -#ifdef __cplusplus +#ifdef __cplusplus extern "C" { #endif - + #include "stdint.h" #include -#include #include +#include #ifndef F_CPU #define F_CPU 8000000UL // 8 MHz clock speed; prefer -DF_CPU=8000000UL in the build flags #endif #define BAUD 38400 #define F_SCL 200000UL +// Build switches: DO_UART compiles in serial logging, ITERATING is a bench +// mode that reports every minute instead of every 15. #define DO_UART true #define ITERATING false -#define MIN(a,b) (((a)<(b))?(a):(b)) -#define MAX(a,b) (((a)>(b))?(a):(b)) +// Serial log line, compiled out entirely when DO_UART is off. The caller's +// file must include uart.h (directly or via another driver header). +#if DO_UART +#define LOG(msg) uart_sendString(msg) +#else +#define LOG(msg) ((void)0) +#endif +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) + +// Shared scratch buffers (RAM is tight: 2 KB total). DATA_BUFFER_65 holds one +// EEPROM page plus a terminator; DATA_BUFFER_7 holds one RTC time readout. extern unsigned char DATA_BUFFER_65[65]; extern uint8_t DATA_BUFFER_7[7]; -//extern uint8_t DATA_BUFFER_254[255]; -extern unsigned char DATA_BUFFER_20[20]; typedef struct { uint8_t payload_len; @@ -56,7 +66,6 @@ typedef struct { } identifier_results; extern identifier_results IDENTIFIER; - typedef struct { uint8_t len; uint8_t to; @@ -71,25 +80,22 @@ extern tx_rx_data_struct RX_DATA; typedef struct { uint8_t Second; // 0-59 uint8_t Minute; // 0-59 - uint8_t Hour; // 0-23 - uint8_t Wday; // Day of week, 1-7 (1 = Sunday) - uint8_t Day; // 1-31 - uint8_t Month; // 1-12 - uint8_t Year; // Full year (e.g., 2024) + uint8_t Hour; // 0-23 + uint8_t Wday; // Day of week, 1-7 (1 = Sunday) + uint8_t Day; // 1-31 + uint8_t Month; // 1-12 + uint8_t Year; // Full year (e.g., 2024) } time_struct; extern time_struct TIME; - typedef enum { RTC_RFM69_SET_TIME_SUCCESS = 1, RTC_RFM69_SET_TIME_FAILED = 2, } RTC_RFM69_STATUS; - typedef enum // Goes into ID { DATA_SEND_SUCCESS = 1, DATA_NOT_SENT = 2 } DATA_SEND_STATUS; - typedef enum // Goes into ID { MSG_TYPE_STRING = 1, @@ -101,13 +107,10 @@ typedef enum // Goes into flags MSG_SEND_COUNTS = 31, MSG_RECV_COUNTS_SUCCESS = 32, MSG_RECV_COUNTS_FAIL = 33, - MSG_RESENT_COUNTS = 34} MSG_REQUEST_TYPE_FLAG; + MSG_RESENT_COUNTS = 34 } MSG_REQUEST_TYPE_FLAG; - - -#ifdef __cplusplus +#ifdef __cplusplus } #endif -#endif /* DEFINES_H */ - +#endif /* DEFINES_H */ diff --git a/avr_code/i2c.c b/avr_code/i2c.c index 4b41c7c..68fb4a4 100644 --- a/avr_code/i2c.c +++ b/avr_code/i2c.c @@ -1,3 +1,5 @@ +// Blocking TWI (I2C) master for the RTC and the NFC tag. + #include "i2c.h" #include diff --git a/avr_code/i2c.h b/avr_code/i2c.h index 46a71a2..21bf9e4 100644 --- a/avr_code/i2c.h +++ b/avr_code/i2c.h @@ -10,18 +10,18 @@ #define TWBR TWBR0 #define TWCR TWCR0 -#define I2C_START_WRITE(device_addr) \ - { \ - if (i2c_start((device_addr << 1) | 0x00)) { \ - return 1; \ - } \ +#define I2C_START_WRITE(device_addr) \ + { \ + if (i2c_start((device_addr << 1) | 0x00)) { \ + return 1; \ + } \ } -#define I2C_START_READ(device_addr) \ - { \ - if (i2c_start((device_addr << 1) | 0x01)) { \ - return 1; \ - } \ +#define I2C_START_READ(device_addr) \ + { \ + if (i2c_start((device_addr << 1) | 0x01)) { \ + return 1; \ + } \ } // A byte at F_SCL takes well under 100 us; anything past this means the bus is @@ -31,23 +31,17 @@ void i2c_init(void); uint8_t i2c_start(uint8_t address); -uint8_t write_one_byte(uint8_t device_addr, uint8_t register_addr, - uint8_t data); -uint8_t write_n_bytes(uint8_t device_addr, uint8_t register_addr, uint8_t *data, - uint8_t n_bytes); +uint8_t write_one_byte(uint8_t device_addr, uint8_t register_addr, uint8_t data); +uint8_t write_n_bytes(uint8_t device_addr, uint8_t register_addr, uint8_t* data, uint8_t n_bytes); uint8_t read_one_byte_16bit_addr_no_err_register(uint8_t device_addr, uint16_t register_addr); -uint8_t read_one_byte_16bit_addr(uint8_t device_addr, uint16_t register_addr, - uint8_t *data); -uint8_t read_n_bytes_16bit_addr(uint8_t device_addr, uint16_t register_addr, uint8_t *data, - uint8_t n_bytes); - +uint8_t read_one_byte_16bit_addr(uint8_t device_addr, uint16_t register_addr, uint8_t* data); +uint8_t read_n_bytes_16bit_addr( + uint8_t device_addr, uint16_t register_addr, uint8_t* data, uint8_t n_bytes); uint8_t read_one_byte_no_err_register(uint8_t device_addr, uint8_t register_addr); -uint8_t read_one_byte(uint8_t device_addr, uint8_t register_addr, - uint8_t *data); -uint8_t read_n_bytes(uint8_t device_addr, uint8_t register_addr, uint8_t *data, - uint8_t n_bytes); +uint8_t read_one_byte(uint8_t device_addr, uint8_t register_addr, uint8_t* data); +uint8_t read_n_bytes(uint8_t device_addr, uint8_t register_addr, uint8_t* data, uint8_t n_bytes); void i2c_stop(void); uint8_t i2c_read_ack(void); diff --git a/avr_code/interrupts.c b/avr_code/interrupts.c index bda89bf..20f8fd8 100644 --- a/avr_code/interrupts.c +++ b/avr_code/interrupts.c @@ -1,7 +1,8 @@ #include "interrupts.h" -void init_pins(void) { +void init_pins(void) +{ // The reed switch (PD3/INT1) switches to ground and the RTC alarm output // (PD2/INT0) is open-drain, so both need the internal pull-up. Leaving them @@ -19,27 +20,32 @@ void init_pins(void) { // asynchronous. Each handler masks its own interrupt while the source is still // asserted, so the low level does not retrigger in a loop. -void set_up_reed_interrupt(void) { +void set_up_reed_interrupt(void) +{ EICRA &= ~((1 << ISC11) | (1 << ISC10)); EIMSK |= (1 << INT1); } -void set_up_minute_interrupt(void) { +void set_up_minute_interrupt(void) +{ EICRA &= ~((1 << ISC01) | (1 << ISC00)); EIMSK |= (1 << INT0); } -void reed_interrupt_enable(void) { +void reed_interrupt_enable(void) +{ EIFR = (1 << INTF1); // Drop anything latched while we were masked EIMSK |= (1 << INT1); } -void minute_interrupt_enable(void) { +void minute_interrupt_enable(void) +{ EIFR = (1 << INTF0); EIMSK |= (1 << INT0); } -void wdt_isr_enable(void) { +void wdt_isr_enable(void) +{ uint8_t sreg = SREG; cli(); wdt_reset(); @@ -57,7 +63,8 @@ void wdt_isr_enable(void) { SREG = sreg; // Restore, never blanket-sei(): these run inside an ISR } -void wdt_isr_disable(void) { +void wdt_isr_disable(void) +{ uint8_t sreg = SREG; cli(); wdt_reset(); diff --git a/avr_code/interrupts.h b/avr_code/interrupts.h index a70baf3..4b7937c 100644 --- a/avr_code/interrupts.h +++ b/avr_code/interrupts.h @@ -1,36 +1,33 @@ -/* +/* * File: interrupts.h * Author: thebears * * Created on December 18, 2024, 12:48 PM */ -#include #include +#include #include #include #include "states.h" #ifndef INTERRUPTS_H -#define INTERRUPTS_H +#define INTERRUPTS_H -#ifdef __cplusplus +#ifdef __cplusplus extern "C" { #endif +void init_pins(void); +void set_up_reed_interrupt(void); +void set_up_minute_interrupt(void); +void reed_interrupt_enable(void); +void minute_interrupt_enable(void); +void wdt_isr_disable(void); +void wdt_isr_enable(void); - - void init_pins(void); - void set_up_reed_interrupt(void); - void set_up_minute_interrupt(void); - void reed_interrupt_enable(void); - void minute_interrupt_enable(void); - void wdt_isr_disable(void); - void wdt_isr_enable(void); - -#ifdef __cplusplus +#ifdef __cplusplus } #endif -#endif /* INTERRUPTS_H */ - +#endif /* INTERRUPTS_H */ diff --git a/avr_code/m95128.c b/avr_code/m95128.c index e2d980f..0b75a6c 100644 --- a/avr_code/m95128.c +++ b/avr_code/m95128.c @@ -1,16 +1,21 @@ +// M95128 SPI EEPROM used as a LIFO spool for unacknowledged radio packets. +// +// Page 0, byte 0: depth of the spool (the highest page currently in use; +// 0 means empty) +// Pages 1..N: one 64-byte packet each -- 60 msg bytes followed by +// flags, from, to, dtype +// +// write_struct_to_last_page() pushes, read_struct_last_page() peeks, and +// delete_last_page() pops. + #include "m95128.h" uint8_t read_value; -uint8_t old_last_page; -uint8_t new_last_page; +// EEPROM chip select (PB0, active low) void spi_eeprom_select(bool state) { SET_PIN_OUT(DDRB, DDB0); - if (!state) { - SET_PIN_HIGH(PORTB, PB0); - } else { - SET_PIN_LOW(PORTB, PB0); - } + SET_PIN_TO(PORTB, PB0, !state); } void eeprom_write(uint8_t page, unsigned const char* msg, uint8_t msg_len) @@ -68,13 +73,12 @@ void eeprom_read(uint8_t page, unsigned char* msg, uint8_t msg_len) void delete_last_page(void) { - old_last_page = get_last_page(); + uint8_t old_last_page = get_last_page(); if (old_last_page == 0) // If we have nothing, no need to delete anything { return; } - new_last_page = old_last_page - 1; - write_last_page_value(new_last_page); + write_last_page_value(old_last_page - 1); eeprom_clear_page(old_last_page); } diff --git a/avr_code/m95128.h b/avr_code/m95128.h index f6cedc8..79fd25e 100644 --- a/avr_code/m95128.h +++ b/avr_code/m95128.h @@ -34,8 +34,7 @@ extern "C" { #endif - void - spi_eeprom_select(bool state); +void spi_eeprom_select(bool state); void eeprom_write(uint8_t page, unsigned const char* msg, uint8_t msg_len); void eeprom_read(uint8_t page, unsigned char* msg, uint8_t msg_len); void eeprom_write_tx_data(uint8_t page, tx_rx_data_struct tx_data); diff --git a/avr_code/main.c b/avr_code/main.c index f1904af..331fcd5 100644 --- a/avr_code/main.c +++ b/avr_code/main.c @@ -1,3 +1,24 @@ +// Wheel revolution counter +// ======================== +// +// Battery-powered node that counts exercise-wheel revolutions and reports them +// over an RFM69 radio. +// +// Hardware (ATmega328PB @ 8 MHz): +// PD3/INT1 reed switch, closes to ground once per wheel revolution +// PD2/INT0 MAX31329 RTC alarm output (open drain), fires once per minute +// SPI1 RFM69 packet radio + M95128 EEPROM (used as a retry spool) +// I2C MAX31329 RTC + ST25DV NFC tag (holds ",") +// +// Operation: +// 1. Sleep in power-down. A reed pulse increments the count for the +// current minute slot; an RTC alarm advances to the next slot. +// 2. Every SEND_INTERVAL minutes, pack the per-minute counts into one +// radio packet (name, diameter, battery, timestamp, counts, hash). +// 3. If the base station does not acknowledge, spool the packet to +// EEPROM; whenever a live packet is acknowledged, retry one spooled +// packet. + #include "adc.h" #include "defines.h" #include "interrupts.h" @@ -8,20 +29,18 @@ #include "rfm69.h" #include "st25dv.h" #include "states.h" - -#if DO_UART #include "uart.h" -#endif #include #include -#include #include #include -#include #include #include +// How many minute slots are collected before a packet is sent. ITERATING is a +// bench-test mode that sends every minute (and lets the reed switch stand in +// for the minute alarm). #if ITERATING #define SEND_INTERVAL 1 #else @@ -30,59 +49,74 @@ #define WHEEL_COUNT_SLOTS 15 -// Erased EEPROM reads back as 0xFF; anything else is a real page count. +// Erased EEPROM reads back as 0xFF; anything else is a real spool depth. #define EEPROM_LAST_PAGE_UNINIT 0xFF -uint16_t self_value; -volatile uint8_t is_debouncing = 0; -volatile bool increment_minute_index = false; -volatile bool increment_wheel_count = false; -volatile uint8_t index_wheel_count = 0; -volatile uint16_t total_wheel_counts[WHEEL_COUNT_SLOTS]; +// --------------------------------------------------------------------------- +// State shared with the interrupt handlers +// --------------------------------------------------------------------------- -RTC_RFM69_STATUS rtc_rfm69_status; +static volatile bool minute_alarm_fired = false; // Set by INT0, consumed by main loop +static volatile bool reed_is_debouncing = false; // Set by INT1, cleared by WDT expiry +static volatile uint8_t minute_slot = 0; // Which wheel_counts[] slot is being filled +static volatile uint16_t wheel_counts[WHEEL_COUNT_SLOTS]; // Revolutions per minute slot -ISR(INT0_vect) { - // The RTC holds INTB low until its flag registers are read, and this is a - // level-triggered interrupt, so mask it here and let main re-arm it once - // the RTC has released the line. +// Whether we ever got a valid timestamp from the base station +static RTC_RFM69_STATUS time_sync_status; + +// --------------------------------------------------------------------------- +// Interrupt handlers +// +// Both external interrupts are low-level triggered (the only mode that can +// wake the MCU from power-down), so each handler must mask itself while its +// source still holds the line low. See interrupts.c. +// --------------------------------------------------------------------------- + +// RTC minute alarm. The RTC holds INTB low until main reads its flag +// registers, so mask INT0 here; main re-arms it after clearing the flags. +ISR(INT0_vect) +{ EIMSK &= ~(1 << INT0); -#if DO_UART - uart_sendString("\t\t\t\tMINUTE INTERRUPT\n"); -#endif - increment_minute_index = true; + minute_alarm_fired = true; + LOG("\t\t\t\tMINUTE INTERRUPT\n"); } -ISR(INT1_vect) { - +// Reed switch: one revolution. The magnet holds the reed closed far longer +// than one bounce, so mask INT1 for a WDT-timed debounce window; the WDT +// handler below re-arms it. +ISR(INT1_vect) +{ #if ITERATING - increment_minute_index = true; + minute_alarm_fired = true; #endif + LOG("\t\t\t\tREED INTERRUPT\n"); -#if DO_UART - uart_sendString("\t\t\t\tREED INTERRUPT\n"); -#endif - - if (!is_debouncing) { - if (index_wheel_count < WHEEL_COUNT_SLOTS) { - total_wheel_counts[index_wheel_count]++; + if (!reed_is_debouncing) { + if (minute_slot < WHEEL_COUNT_SLOTS) { + wheel_counts[minute_slot]++; } - is_debouncing = 1; - // Mask INT1 for the debounce window: the magnet holds the reed closed - // (and the pin low) for far longer than one revolution's worth of - // bounce, and a level-triggered interrupt would retrigger continuously. + reed_is_debouncing = true; EIMSK &= ~(1 << INT1); wdt_isr_enable(); } } -ISR(WDT_vect) { - is_debouncing = 0; +// Debounce window over: allow the next reed pulse to count. +ISR(WDT_vect) +{ + reed_is_debouncing = false; wdt_isr_disable(); reed_interrupt_enable(); } -void start_sleeping(void) { +// --------------------------------------------------------------------------- +// Power management +// --------------------------------------------------------------------------- + +// Cut power to every peripheral and enter power-down until the reed switch, +// the RTC alarm, or the debounce watchdog wakes us. +static void sleep_until_interrupt(void) +{ spi_eeprom_select(false); spi_rfm69_select(false); rfid_set_low_power_down(true); @@ -92,13 +126,13 @@ void start_sleeping(void) { set_sleep_mode(SLEEP_MODE_PWR_DOWN); + // avr-libc sleep idiom: test for pending work with interrupts off, and + // sei() only immediately before sleep_cpu() (the next instruction always + // executes before any pending interrupt), so an alarm that fired while the + // rails were dropping cannot be slept through. sleep_bod_disable() is a + // timed 3-cycle sequence and must sit directly before sleep_cpu(). cli(); - // Don't sleep through work that arrived while we were dropping the rails. - // Testing the flag with interrupts off, then sei() immediately before - // sleep_cpu(), is the avr-libc idiom that closes that race -- and - // sleep_bod_disable() is a timed sequence, so it belongs here and not - // before sleep_enable() where it had no effect at all. - if (!increment_minute_index) { + if (!minute_alarm_fired) { sleep_enable(); sleep_bod_disable(); sei(); @@ -108,62 +142,168 @@ void start_sleeping(void) { sei(); } -uint16_t get_battery_reading(void) { - adc_Enable(); - adc_GetConversion(14); - adc_GetConversion(14); - self_value = adc_GetConversion(14); - adc_Disable(); - return self_value; +// Restore the supplies that sleep_until_interrupt() dropped. Everything on the +// I2C bus is dead until this runs. +static void wake_peripheral_rails(void) +{ + ldo_set_state(true); + rfid_set_i2c_power(true); + _delay_ms(1); } -// i2c Addresses +// --------------------------------------------------------------------------- +// Measurement helpers +// --------------------------------------------------------------------------- -// RTC -// 0x68 (0xD0 W) (0xD1 R) +// Battery level via the internal 1.1 V bandgap: the first conversions after +// enabling the ADC read low, so take three and keep the last. +static uint16_t read_battery_level(void) +{ + adc_Enable(); + adc_GetConversion(ADC_CHANNEL_BANDGAP); + adc_GetConversion(ADC_CHANNEL_BANDGAP); + uint16_t level = adc_GetConversion(ADC_CHANNEL_BANDGAP); + adc_Disable(); + return level; +} -// NFC -// 0x2D (0x5A W) (0x5B R) -// 0x53 (0xA6 W) (0xA7 R) -// 0x57 (0xAE W) (0xAF R) +// Atomically hand out the collected counts and start the next collection +// period, so a reed pulse landing mid-copy is neither lost nor double-counted. +static void take_counts_snapshot(uint16_t snapshot[WHEEL_COUNT_SLOTS]) +{ + ATOMIC_BLOCK(ATOMIC_RESTORESTATE) + { + for (uint8_t c = 0; c < WHEEL_COUNT_SLOTS; c++) { + snapshot[c] = wheel_counts[c]; + wheel_counts[c] = 0; + } + minute_slot = 0; + } +} -int main(void) { +// --------------------------------------------------------------------------- +// Radio reporting +// --------------------------------------------------------------------------- + +// Build and send the periodic counts packet. Unacknowledged packets go to the +// EEPROM spool; each acknowledged one buys a retry of one spooled packet. +static void send_wheel_counts_report(void) +{ + rfm69_init(); + rfid_set_low_power_down(false); + _delay_ms(1); + + // Re-read the tag each period so a renamed nugget takes effect without a + // reset. + IDENTIFIER = get_nugget_data(); + + if (time_sync_status == RTC_RFM69_SET_TIME_FAILED) { + time_sync_status = set_time_from_rfm69(IDENTIFIER); + } + + uint16_t counts_snapshot[WHEEL_COUNT_SLOTS]; + take_counts_snapshot(counts_snapshot); + + reset_txrx_struct(&TX_DATA); + TX_DATA = generate_wheel_counts_message( + IDENTIFIER, rtc_read_time(), read_battery_level(), counts_snapshot); + LOG("TX DATA Sent\n"); +#if DO_UART + uart_print_tx_rx_data(TX_DATA); +#endif + + DATA_SEND_STATUS result = send_message(TX_DATA); + if (result == DATA_NOT_SENT) { + LOG(" TX DATA not sent, writing to SPI\n"); + write_struct_to_last_page(TX_DATA); + return; + } + + // The base station is listening -- use the chance to drain one packet from + // the spool. + if (get_last_page() > 0) { + reset_txrx_struct(&TX_DATA); + TX_DATA = read_struct_last_page(); + TX_DATA.flags = MSG_RESENT_COUNTS; + _delay_ms(250); + + result = send_message(TX_DATA); + LOG("TX DATA From SPI Memory\n"); +#if DO_UART + uart_print_tx_rx_data(TX_DATA); +#endif + + // Only drop the spooled page once it is actually acknowledged; + // deleting on failure would lose the data. + if (result == DATA_SEND_SUCCESS) { + delete_last_page(); + } else { + LOG(" SPI not sent\n"); + } + } +} + +// One RTC alarm has fired: clear it, advance the minute slot, and send a +// report if a full period has been collected. +static void handle_minute_alarm(void) +{ + LOG("In minute index\n"); + + uint8_t slots_filled; + ATOMIC_BLOCK(ATOMIC_RESTORESTATE) + { + if (minute_slot < WHEEL_COUNT_SLOTS) { + minute_slot += 1; + } + slots_filled = minute_slot; + } + + wake_peripheral_rails(); + + // Reading the RTC flag registers releases the (level-triggered) INTB line, + // after which INT0 can safely be re-armed. + rtc_read_interrupt_register(); + rtc_read_status_register(); + minute_interrupt_enable(); + + if (slots_filled >= SEND_INTERVAL) { + send_wheel_counts_report(); + } +} + +// --------------------------------------------------------------------------- +// Start-up +// --------------------------------------------------------------------------- + +static void init_all_hardware(void) +{ ldo_set_state(true); _delay_ms(10); init_pins(); + #if DO_UART uart_init(); - uart_sendString("---- STARTING ----\n"); + LOG("---- STARTING ----\n"); uart_wait_until_sent(); #endif i2c_init(); - init_spi(); adc_Initialize(); - set_up_reed_interrupt(); set_up_minute_interrupt(); -#if DO_UART - uart_sendString("Set up AVR interrupts\n"); -#endif + LOG("Set up AVR interrupts\n"); rtc_set_per_minute_alarm(); rtc_set_alarm_config(); rtc_enable_interrupts(); - rtc_read_interrupt_register(); + rtc_read_interrupt_register(); // Clear any alarm already pending rtc_read_status_register(); -#if DO_UART - uart_sendString("Set up RTC interrupts\n"); -#endif - - + LOG("Set up RTC interrupts\n"); rfm69_init(); -#if DO_UART - uart_sendString("Initialized RFM69\n"); -#endif + LOG("Initialized RFM69\n"); // Only initialise the spool pointer when it has never been written -- // clearing it unconditionally would discard every unsent message across a @@ -171,157 +311,60 @@ int main(void) { if (get_last_page() == EEPROM_LAST_PAGE_UNINIT) { write_last_page_value(0); } -#if DO_UART - uart_sendString("Set up last page value for SPI flash\n"); -#endif + LOG("Set up last page value for SPI flash\n"); +} - for (uint8_t c = 0; c < WHEEL_COUNT_SLOTS; c++) { - total_wheel_counts[c] = 0; - } - - - - // Get the nugget's name and wheel diameter - IDENTIFIER = get_nugget_data(); -#if DO_UART - uart_sendString("Got nugget data from RFID\n"); -#endif - - - - // Request time from radio - rtc_rfm69_status = set_time_from_rfm69(IDENTIFIER); - if (rtc_rfm69_status == RTC_RFM69_SET_TIME_SUCCESS) { - for (int i = 0; i < 5; i++) { - led_1_set_state(true); +// Five long blinks for a successful time sync, five short ones for a failure. +static void blink_time_sync_result(bool success) +{ + for (uint8_t i = 0; i < 5; i++) { + led_1_set_state(true); + if (success) { _delay_ms(90); - led_1_set_state(false); + } else { _delay_ms(10); } - } else { - for (int i = 0; i < 5; i++) { - led_1_set_state(true); + led_1_set_state(false); + if (success) { _delay_ms(10); - led_1_set_state(false); + } else { _delay_ms(90); } } -#if DO_UART - if (rtc_rfm69_status == RTC_RFM69_SET_TIME_FAILED) { - uart_sendString("Failed to get time \n"); - } else { - uart_sendString("Success in get time \n"); - }; +} -#endif +int main(void) +{ + init_all_hardware(); + for (uint8_t c = 0; c < WHEEL_COUNT_SLOTS; c++) { + wheel_counts[c] = 0; + } - get_battery_reading(); - while (1) { + // The nugget's name and wheel diameter live on the NFC tag + IDENTIFIER = get_nugget_data(); + LOG("Got nugget data from RFID\n"); + // Ask the base station for the current time and load it into the RTC + time_sync_status = set_time_from_rfm69(IDENTIFIER); + blink_time_sync_result(time_sync_status == RTC_RFM69_SET_TIME_SUCCESS); + LOG(time_sync_status == RTC_RFM69_SET_TIME_SUCCESS ? "Success in get time \n" + : "Failed to get time \n"); - spi_rfm69_select(false); - spi_eeprom_select(false); + read_battery_level(); // Throwaway read to settle the ADC path - start_sleeping(); + while (1) { + sleep_until_interrupt(); - // Short critical sections around the shared variables only. The old - // blanket cli() stayed in force through the whole radio/EEPROM - // sequence, so every reed pulse in that multi-second window was lost. bool minute_elapsed; - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { - minute_elapsed = increment_minute_index; - increment_minute_index = false; + ATOMIC_BLOCK(ATOMIC_RESTORESTATE) + { + minute_elapsed = minute_alarm_fired; + minute_alarm_fired = false; } if (minute_elapsed) { -#if DO_UART - uart_sendString("In minute index\n"); -#endif - uint8_t slot; - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { - if (index_wheel_count < WHEEL_COUNT_SLOTS) { - index_wheel_count += 1; - } - slot = index_wheel_count; - } - - // The I2C rail has to be back up before we touch the RTC: sleeping - // dropped both the LDO and the tag's supply. - ldo_set_state(true); - rfid_set_i2c_power(true); - _delay_ms(1); - - rtc_read_interrupt_register(); - rtc_read_status_register(); - - // Reading the flags releases INTB, so INT0 can safely be re-armed. - minute_interrupt_enable(); - - if (slot >= SEND_INTERVAL) { - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { index_wheel_count = 0; } - rfm69_init(); - rfid_set_low_power_down(false); - _delay_ms(1); - IDENTIFIER = get_nugget_data(); - - // Request time from radio if we don't have a good time stamp yet - if (rtc_rfm69_status == RTC_RFM69_SET_TIME_FAILED) { - rtc_rfm69_status = set_time_from_rfm69(IDENTIFIER); - } - - // Snapshot and clear the counters in one critical section so - // a reed pulse landing mid-packet is neither lost nor double - // counted. - uint16_t counts_snapshot[WHEEL_COUNT_SLOTS]; - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { - for (uint8_t c = 0; c < WHEEL_COUNT_SLOTS; c++) { - counts_snapshot[c] = total_wheel_counts[c]; - total_wheel_counts[c] = 0; - } - } - - // Generate wheel counts message - reset_txrx_struct(&TX_DATA); - TX_DATA = generate_wheel_counts_message( - IDENTIFIER, rtc_read_time(), get_battery_reading(), counts_snapshot); - -#if DO_UART - uart_sendString("TX DATA Sent\n"); - uart_print_tx_rx_data(TX_DATA); -#endif - - - DATA_SEND_STATUS result = send_message(TX_DATA); - if (result == DATA_NOT_SENT) { -#if DO_UART - uart_sendString(" TX DATA not sent, writing to SPI\n"); -#endif - write_struct_to_last_page(TX_DATA); - } - - if ((result == DATA_SEND_SUCCESS) && (get_last_page() > 0)) { - reset_txrx_struct(&TX_DATA); - TX_DATA = read_struct_last_page(); - TX_DATA.flags = MSG_RESENT_COUNTS; - _delay_ms(250); - result = send_message(TX_DATA); -#if DO_UART - uart_sendString("TX DATA From SPI Memory\n"); - uart_print_tx_rx_data(TX_DATA); -#endif - // Only drop the spooled page once it is actually - // acknowledged, otherwise a failed retry loses the data. - if (result == DATA_SEND_SUCCESS) { - delete_last_page(); - } -#if DO_UART - else { - uart_sendString(" SPI not sent\n"); - } -#endif - } - } + handle_minute_alarm(); } } } diff --git a/avr_code/max31329.c b/avr_code/max31329.c index dc702af..3998388 100644 --- a/avr_code/max31329.c +++ b/avr_code/max31329.c @@ -1,5 +1,6 @@ +// MAX31329 RTC driver, plus the over-the-radio time sync that seeds it. + #include "max31329.h" -bool result; RTC_RFM69_STATUS set_time_from_rfm69(identifier_results id_data) { @@ -14,13 +15,13 @@ RTC_RFM69_STATUS set_time_from_rfm69(identifier_results id_data) TX_DATA.dtype = MSG_TYPE_STRING; rfm69_write_msg(TX_DATA); - result = wait_rx_payload_ready_timeout(100); - if (result) { + if (wait_rx_payload_ready_timeout(100)) { RX_DATA = rfm69_read_msg(); - if (RX_DATA.flags == 2) { + if (RX_DATA.flags == MSG_RESP_CTIME) { - // TIME.Second = rx_data.msg[0]; + // Seed the seconds from the name hash instead of the reply so + // nodes don't all wake and transmit in the same instant. TIME.Second = id_data.hashed; TIME.Minute = RX_DATA.msg[1]; @@ -33,43 +34,47 @@ RTC_RFM69_STATUS set_time_from_rfm69(identifier_results id_data) rtc_write_time(TIME); return RTC_RFM69_SET_TIME_SUCCESS; } - } else { - // uart_sendString("Did not get RX\n"); } return RTC_RFM69_SET_TIME_FAILED; } +// Masking out minutes, hours, and day makes alarm 2 match once every minute uint8_t rtc_set_per_minute_alarm(void) { + DATA_BUFFER_7[0] = RTC_ALM_MASK_BIT; + DATA_BUFFER_7[1] = RTC_ALM_MASK_BIT; + DATA_BUFFER_7[2] = RTC_ALM_MASK_BIT; - DATA_BUFFER_7[0] = 0x80; - DATA_BUFFER_7[1] = 0x80; - DATA_BUFFER_7[2] = 0x80; - - return write_n_bytes(I2C_ADDR, 0x13, DATA_BUFFER_7, 3); + return write_n_bytes(I2C_ADDR, RTC_REG_ALM2_MIN, DATA_BUFFER_7, 3); } void uart_print_rtc_time(time_struct td) { char str_rtc[26]; snprintf( - str_rtc, sizeof(str_rtc), "%u/%02u/%02u %u:%02u:%02u", 2000 + td.Year, - td.Month, td.Day, td.Hour, td.Minute, td.Second); + str_rtc, sizeof(str_rtc), "%u/%02u/%02u %u:%02u:%02u", 2000 + td.Year, td.Month, td.Day, + td.Hour, td.Minute, td.Second); uart_sendString(str_rtc); uart_sendString("\n"); } uint8_t rtc_read_register(uint8_t addr) { return read_one_byte_no_err_register(I2C_ADDR, addr); } -uint8_t rtc_read_status_register(void) { return rtc_read_register(0x00); } +uint8_t rtc_read_status_register(void) { return rtc_read_register(RTC_REG_STATUS); } -uint8_t rtc_read_interrupt_register(void) { return rtc_read_register(0x01); } +uint8_t rtc_read_interrupt_register(void) { return rtc_read_register(RTC_REG_INT_EN); } -uint8_t rtc_set_alarm_config(void) { return write_one_byte(I2C_ADDR, 0x04, 0b00001010); } +uint8_t rtc_set_alarm_config(void) { return write_one_byte(I2C_ADDR, RTC_REG_CONFIG2, 0b00001010); } -uint8_t rtc_enable_interrupts(void) { return write_one_byte(I2C_ADDR, 0x01, 0b00000010); } +uint8_t rtc_enable_interrupts(void) +{ + return write_one_byte(I2C_ADDR, RTC_REG_INT_EN, RTC_INT_EN_A2IE); +} -uint8_t rtc_read_time_array(uint8_t* data) { return read_n_bytes(I2C_ADDR, 0x06, data, 7); } +uint8_t rtc_read_time_array(uint8_t* data) +{ + return read_n_bytes(I2C_ADDR, RTC_REG_SECONDS, data, 7); +} time_struct rtc_read_time(void) { @@ -95,7 +100,7 @@ uint8_t rtc_write_time(time_struct tm) return 1; uint8_t err = 0; - err |= i2c_write(0x06); + err |= i2c_write(RTC_REG_SECONDS); err |= i2c_write(DEC2BCD(tm.Second)); err |= i2c_write(DEC2BCD(tm.Minute)); err |= i2c_write(DEC2BCD(tm.Hour)); diff --git a/avr_code/max31329.h b/avr_code/max31329.h index 985c8f8..ab20cf5 100644 --- a/avr_code/max31329.h +++ b/avr_code/max31329.h @@ -20,6 +20,16 @@ extern "C" { #define I2C_ADDR 0x68 +// MAX31329 register map (the subset this driver touches) +#define RTC_REG_STATUS 0x00 // Reading clears the alarm flags / releases INTB +#define RTC_REG_INT_EN 0x01 +#define RTC_REG_CONFIG2 0x04 +#define RTC_REG_SECONDS 0x06 // Start of the 7-byte BCD time block +#define RTC_REG_ALM2_MIN 0x13 // Start of the 3-byte alarm-2 block + +#define RTC_INT_EN_A2IE 0b00000010 // Alarm-2 interrupt enable +#define RTC_ALM_MASK_BIT 0x80 // "Don't match this field" bit in each alarm register + #define DEC2BCD(n) ((n) + (6 * ((n) / 10))) #define BCD2DEC(n) ((n) - (6 * ((n) >> 4))) diff --git a/avr_code/ndef.c b/avr_code/ndef.c index 47e9b38..ce4d484 100644 --- a/avr_code/ndef.c +++ b/avr_code/ndef.c @@ -1,4 +1,6 @@ - +// Minimal NDEF parser: finds the first record in a raw tag dump and accepts +// only a short text record, whose text becomes the node's "name,diameter" +// identity string. #include "ndef.h" // Everything read here comes off an NFC tag that anyone can write, so every @@ -11,7 +13,8 @@ } \ } -ndef_message readNDEFText(unsigned char *buf, uint8_t buf_len) { +ndef_message readNDEFText(unsigned char* buf, uint8_t buf_len) +{ uint16_t addr = 0; NDEF_MSG.success = 0; NDEF_MSG.payload_len = 0; @@ -80,7 +83,7 @@ ndef_message readNDEFText(unsigned char *buf, uint8_t buf_len) { return NDEF_MSG; } payload_length -= lang_str_len; // Language string - payload_length -= 1; // The byte that says how long the language string is + payload_length -= 1; // The byte that says how long the language string is NDEF_NEED((uint16_t)lang_str_len + 1); addr += lang_str_len; @@ -99,10 +102,8 @@ ndef_message readNDEFText(unsigned char *buf, uint8_t buf_len) { NDEF_MSG.payload[payload_length] = '\0'; NDEF_MSG.payload_len = payload_length; - #if DO_UART - uart_sendString(NDEF_MSG.payload); - uart_sendString("\n"); - #endif + LOG(NDEF_MSG.payload); + LOG("\n"); return NDEF_MSG; }; \ No newline at end of file diff --git a/avr_code/ndef.h b/avr_code/ndef.h index 337bf49..6c8f8ff 100644 --- a/avr_code/ndef.h +++ b/avr_code/ndef.h @@ -13,10 +13,10 @@ extern "C" { #endif #include "defines.h" -#include -#include -#include #include "uart.h" +#include +#include +#include #define NDEF_TLV 0x03 #define NDEF_SHORT_RECORD (1 << 4) @@ -28,7 +28,7 @@ extern "C" { #define NDEF_ERR_TRUNCATED 13 #define NDEF_ERR_BAD_LENGTH 14 -ndef_message readNDEFText(unsigned char *buf, uint8_t buf_len); +ndef_message readNDEFText(unsigned char* buf, uint8_t buf_len); #ifdef __cplusplus } diff --git a/avr_code/power_mgmt.c b/avr_code/power_mgmt.c index 65d6833..b597281 100644 --- a/avr_code/power_mgmt.c +++ b/avr_code/power_mgmt.c @@ -1,6 +1,7 @@ #include "power_mgmt.h" -void shutdown_all_peripherals(void) { +void shutdown_all_peripherals(void) +{ power_adc_disable(); power_timer0_disable(); diff --git a/avr_code/power_mgmt.h b/avr_code/power_mgmt.h index 631eb36..c69c1cd 100644 --- a/avr_code/power_mgmt.h +++ b/avr_code/power_mgmt.h @@ -1,4 +1,4 @@ -/* +/* * File: power_mgmt.h * Author: thebears * @@ -7,18 +7,16 @@ #include "defines.h" // for DO_UART, which shutdown_all_peripherals() tests #include #ifndef POWER_MGMT_H -#define POWER_MGMT_H +#define POWER_MGMT_H -#ifdef __cplusplus +#ifdef __cplusplus extern "C" { #endif +void shutdown_all_peripherals(void); - void shutdown_all_peripherals(void); - -#ifdef __cplusplus +#ifdef __cplusplus } #endif -#endif /* POWER_MGMT_H */ - +#endif /* POWER_MGMT_H */ diff --git a/avr_code/rfm69.c b/avr_code/rfm69.c index 71401a9..1542f59 100644 --- a/avr_code/rfm69.c +++ b/avr_code/rfm69.c @@ -1,142 +1,19 @@ +// RFM69 packet radio driver, plus the node's send-with-acknowledgement +// protocol and the wheel-counts packet builder. +// +// Layout of this file: +// 1. Register access over SPI +// 2. Mode control and status waits +// 3. Raw packet write/read (FIFO) +// 4. Acknowledged send protocol +// 5. Wheel-counts packet builder and hashes +// 6. Radio configuration (rfm69_init) + #include "rfm69.h" -uint32_t msg_hash; -uint8_t p_hash_1; -uint8_t p_hash_2; -uint8_t p_hash_3; - -uint8_t c_hash_1; -uint8_t c_hash_2; -uint8_t c_hash_3; - -bool cond_1; -bool cond_2; -bool cond_3; - -DATA_SEND_STATUS send_message(tx_rx_data_struct tx_data) -{ - - - rfm69_write_msg(tx_data); - - - p_hash_1 = tx_data.msg[57]; - p_hash_2 = tx_data.msg[58]; - p_hash_3 = tx_data.msg[59]; - - for (uint8_t i = 0; i < 10; i++) { - bool result = wait_rx_payload_ready_timeout(50); - if (result) { - RX_DATA = rfm69_read_msg(); -#if DO_UART - uart_sendString("RX DATA\n"); - uart_print_tx_rx_data(RX_DATA); -#endif - c_hash_1 = RX_DATA.msg[0]; - c_hash_2 = RX_DATA.msg[1]; - c_hash_3 = RX_DATA.msg[2]; - - cond_1 = (p_hash_1 == c_hash_1) && (p_hash_2 == c_hash_2) && (p_hash_3 == c_hash_3); - cond_2 = (tx_data.from == RX_DATA.to) && (tx_data.to == RX_DATA.from); - cond_3 = cond_1 && cond_2; - - if (cond_3 && (RX_DATA.flags == MSG_RECV_COUNTS_SUCCESS) && (RX_DATA.msg[3] == 0xFF)) { -#if DO_UART - uart_sendString(" RX DATA SUCCESS\n"); -#endif - return DATA_SEND_SUCCESS; - } -#if DO_UART - else if ( - cond_3 && (RX_DATA.flags == MSG_RECV_COUNTS_FAIL) && (RX_DATA.msg[3] == 0x00)) { - uart_sendString(" RX DATA FAILED\n"); - } else { - uart_sendString(" RX DATA ANOTHER ERROR\n"); - } -#endif - } - } - return DATA_NOT_SENT; -} - -void uart_print_tx_rx_data(tx_rx_data_struct tx_rx_print) -{ - - // uart_print_uint8(tx_rx_print.len, "LEN; "); - // uart_print_uint8(tx_rx_print.to, "TO;"); - // uart_print_uint8(tx_rx_print.from, "FROM;"); - // uart_print_uint8(tx_rx_print.dtype, "DTYPE;"); - // uart_print_uint8(tx_rx_print.flags, "FLAGS;"); - DATA_BUFFER_7[0] = tx_rx_print.len; - DATA_BUFFER_7[1] = tx_rx_print.to; - DATA_BUFFER_7[2] = tx_rx_print.from; - DATA_BUFFER_7[3] = tx_rx_print.dtype; - DATA_BUFFER_7[4] = tx_rx_print.flags; - uart_sendString(" "); - uart_print_uint8_array(DATA_BUFFER_7, 5, "LEN,TO,FROM,DTYPE,FLAGS\n"); - uart_sendString(" "); - uart_sendStringArray(tx_rx_print.msg, 20); - uart_sendChar('\n'); - uart_sendString(" "); - uart_print_uint8_array(tx_rx_print.msg, tx_rx_print.len, "\n"); -} - -void rfm69_write_msg(tx_rx_data_struct txrxd) -{ - // TxStart is configured as FifoNotEmpty, so the radio begins transmitting - // the moment the first byte lands. Fill the FIFO from standby and only then - // switch to TX, otherwise the packet goes out ahead of its own payload. - set_rfm69_standby(); - - spi_rfm69_select(true); - spi_write(REG_FIFO | RFM69_SPI_WRITE); - if (txrxd.len > (60)) { - txrxd.len = 60; - } - - spi_write(txrxd.len + 4); - spi_write(txrxd.to); - spi_write(txrxd.from); - spi_write(txrxd.dtype); - spi_write(txrxd.flags); - for (uint8_t x = 0; x < txrxd.len; x++) { - spi_write(txrxd.msg[x]); - } - spi_rfm69_select(false); - - set_rfm69_tx_mode(); - wait_tx_sent(); - set_rfm69_rx_mode(); -} - -tx_rx_data_struct rfm69_read_msg(void) -{ - memset(RX_DATA.msg, ' ', sizeof(RX_DATA.msg)); - spi_rfm69_select(true); - spi_write(REG_FIFO); - - uint8_t raw_len = spi_read(); - RX_DATA.to = spi_read(); - RX_DATA.from = spi_read(); - RX_DATA.dtype = spi_read(); - RX_DATA.flags = spi_read(); - - // The length byte comes off the air and is not trustworthy: below 4 it - // underflows to ~252, above 60 it walks off the end of msg[]. - uint8_t len_f = (raw_len < 4) ? 0 : (uint8_t)(raw_len - 4); - if (len_f > sizeof(RX_DATA.msg)) { - len_f = sizeof(RX_DATA.msg); - } - RX_DATA.len = len_f; - - for (uint8_t idx_f = 0; idx_f < len_f; idx_f++) { - RX_DATA.msg[idx_f] = spi_read(); - } - spi_rfm69_select(false); - set_rfm69_idle(); - - return RX_DATA; -} +// --------------------------------------------------------------------------- +// 1. Register access over SPI ("_rt" = register transfer) +// --------------------------------------------------------------------------- uint8_t spi_read_rfm69_rt(uint8_t reg) { @@ -167,95 +44,40 @@ uint8_t spi_write_rfm69_multiple_rt(uint8_t reg, const char* vals, uint8_t len) return data_init; } -// name (max 10), 10 -// diameter (max 10), 20 -// battery_value 16-bit, 22 -// time_reading (min) 23 -// time_reading (hour) 24 -// time_reading (day) 25 -// time_reading (month) 26 -// time_reading (year) 27 -// 15 * per-min +30 57 -// three byte hash check 3 +// --------------------------------------------------------------------------- +// 2. Mode control and status waits +// +// Every wait has a bail-out: an absent or unpowered radio must not hang the +// firmware, since no watchdog reset is armed. +// --------------------------------------------------------------------------- -tx_rx_data_struct generate_wheel_counts_message( - identifier_results idd, time_struct time, uint16_t battery_value, volatile uint16_t counts[15]) +void reset_rfm69(void) { - - reset_txrx_struct(&TX_DATA); - memcpy(TX_DATA.msg, idd.name_str, MIN(10, idd.name_len)); - memcpy(TX_DATA.msg + 10, idd.diameter_str, MIN(10, idd.diameter_len)); - - TX_DATA.msg[20] = battery_value & 0xFF; - TX_DATA.msg[21] = (battery_value >> 8) & 0xFF; - - TX_DATA.msg[22] = time.Minute; - TX_DATA.msg[23] = time.Hour; - TX_DATA.msg[24] = time.Day; - TX_DATA.msg[25] = time.Month; - TX_DATA.msg[26] = time.Year; - - for (uint8_t idx = 0; idx < 15; idx++) { - TX_DATA.msg[26 + (2 * idx + 1)] = counts[idx] & 0xFF; // LSB first - TX_DATA.msg[26 + (2 * idx + 2)] = (counts[idx] >> 8) & 0xFF; // MSB second - } - - msg_hash = hash_3bytes(TX_DATA.msg, 57); - TX_DATA.msg[57] = msg_hash & 0xFF; - TX_DATA.msg[58] = (msg_hash >> 8) & 0xFF; - TX_DATA.msg[59] = (msg_hash >> 16) & 0xFF; - - TX_DATA.len = sizeof(TX_DATA.msg); - TX_DATA.flags = MSG_SEND_COUNTS; - TX_DATA.from = idd.hashed; - TX_DATA.to = 255; - TX_DATA.dtype = MSG_TYPE_BINARY; - return TX_DATA; -} - -uint32_t hash_3bytes(unsigned const char* str, uint8_t str_len) -{ - uint32_t hash = 0; - - for (uint8_t i = 0; i < str_len; i++) { - hash = (hash * 31 + str[i]) % 0xFFFFFF; - } - return hash; -} - -void set_rfm69_power_amp_boost(void) -{ - spi_write_rfm69_rt(REG_OCP, VAL_OCP_OFF); - spi_write_rfm69_rt(REG_TEST_PA1, VAL_TEST_PA1_BOOST); - spi_write_rfm69_rt(REG_TEST_PA2, VAL_TEST_PA2_BOOST); -} - -void set_rfm69_power_amp_normal(void) -{ - spi_write_rfm69_rt(REG_TEST_PA1, VAL_TEST_PA1_NORMAL); - spi_write_rfm69_rt(REG_TEST_PA2, VAL_TEST_PA2_NORMAL); - spi_write_rfm69_rt(REG_OCP, VAL_OCP_ON); -} - -void reset_txrx_struct(tx_rx_data_struct* s) -{ - s->len = 0; - s->to = 255; - s->from = 255; - s->dtype = 0; - s->flags = 0; - memset(s->msg, ' ', 60); + rfm69_reset_state(true); // Reset line is active high + _delay_ms(10); + rfm69_reset_state(false); + _delay_ms(10); } void set_rfm69_mode(uint8_t target_mode) { - uint8_t mode = spi_read_rfm69_rt(REG_OP_MODE); mode &= ~VAL_OPMODE_MASK; mode |= (target_mode & VAL_OPMODE_MASK); spi_write_rfm69_rt(REG_OP_MODE, mode); } +bool wait_rfm69_mode_ready(void) +{ + for (uint16_t attempts = 0; attempts < RFM69_TIMEOUT_MS; attempts++) { + if (MODE_READY) { + return true; + } + _delay_ms(1); + } + return false; +} + bool wait_tx_sent(void) { for (uint16_t attempts = 0; attempts < RFM69_TIMEOUT_MS; attempts++) { @@ -267,18 +89,6 @@ bool wait_tx_sent(void) return false; } -uint8_t hash(const char* str, uint8_t min, uint8_t max) -{ - unsigned int hash = 0; - while (*str) { - hash = (hash * 31) + (unsigned char)(*str); - str++; - } - - unsigned int range = max - min + 1; - return (hash % range) + min; -} - bool wait_rx_payload_ready_timeout(uint16_t attempts) { set_rfm69_rx_mode(); @@ -293,20 +103,22 @@ bool wait_rx_payload_ready_timeout(uint16_t attempts) return RX_PAYLOAD_READY != 0; } -bool wait_rx_payload_ready(void) +bool wait_rx_payload_ready(void) { return wait_rx_payload_ready_timeout(RFM69_TIMEOUT_MS); } + +// The PA boost registers are only allowed during TX; OCP must be off for the +// +20 dBm path, per the datasheet's high-power sequence. +void set_rfm69_power_amp_boost(void) { - return wait_rx_payload_ready_timeout(RFM69_TIMEOUT_MS); + spi_write_rfm69_rt(REG_OCP, VAL_OCP_OFF); + spi_write_rfm69_rt(REG_TEST_PA1, VAL_TEST_PA1_BOOST); + spi_write_rfm69_rt(REG_TEST_PA2, VAL_TEST_PA2_BOOST); } -bool wait_rfm69_mode_ready(void) +void set_rfm69_power_amp_normal(void) { - for (uint16_t attempts = 0; attempts < RFM69_TIMEOUT_MS; attempts++) { - if (MODE_READY) { - return true; - } - _delay_ms(1); - } - return false; + spi_write_rfm69_rt(REG_TEST_PA1, VAL_TEST_PA1_NORMAL); + spi_write_rfm69_rt(REG_TEST_PA2, VAL_TEST_PA2_NORMAL); + spi_write_rfm69_rt(REG_OCP, VAL_OCP_ON); } void set_rfm69_tx_mode(void) @@ -337,61 +149,267 @@ void set_rfm69_sleep(void) wait_rfm69_mode_ready(); } -void set_rfm69_idle(void) +// "Idle" between packets is just standby +void set_rfm69_idle(void) { set_rfm69_standby(); } + +// --------------------------------------------------------------------------- +// 3. Raw packet write/read +// +// On-air packet layout (variable-length mode, CRC on): +// [len] [to] [from] [dtype] [flags] [msg bytes ...] +// where len counts everything after itself, so msg length + 4 header bytes. +// --------------------------------------------------------------------------- + +#define PACKET_HEADER_LEN 4 + +void reset_txrx_struct(tx_rx_data_struct* s) { - set_rfm69_power_amp_normal(); - set_rfm69_mode(VAL_OPMODE_STDBY); - wait_rfm69_mode_ready(); + s->len = 0; + s->to = 255; + s->from = 255; + s->dtype = 0; + s->flags = 0; + memset(s->msg, ' ', sizeof(s->msg)); } -void reset_rfm69(void) +void rfm69_write_msg(tx_rx_data_struct txrxd) { - rfm69_reset_state(true); - _delay_ms(10); - rfm69_reset_state(false); - _delay_ms(10); + // TxStart is configured as FifoNotEmpty, so the radio begins transmitting + // the moment the first byte lands. Fill the FIFO from standby and only then + // switch to TX, otherwise the packet goes out ahead of its own payload. + set_rfm69_standby(); + + if (txrxd.len > sizeof(txrxd.msg)) { + txrxd.len = sizeof(txrxd.msg); + } + + spi_rfm69_select(true); + spi_write(REG_FIFO | RFM69_SPI_WRITE); + spi_write(txrxd.len + PACKET_HEADER_LEN); + spi_write(txrxd.to); + spi_write(txrxd.from); + spi_write(txrxd.dtype); + spi_write(txrxd.flags); + for (uint8_t x = 0; x < txrxd.len; x++) { + spi_write(txrxd.msg[x]); + } + spi_rfm69_select(false); + + set_rfm69_tx_mode(); + wait_tx_sent(); + set_rfm69_rx_mode(); } +tx_rx_data_struct rfm69_read_msg(void) +{ + memset(RX_DATA.msg, ' ', sizeof(RX_DATA.msg)); + spi_rfm69_select(true); + spi_write(REG_FIFO); + + uint8_t raw_len = spi_read(); + RX_DATA.to = spi_read(); + RX_DATA.from = spi_read(); + RX_DATA.dtype = spi_read(); + RX_DATA.flags = spi_read(); + + // The length byte comes off the air and is not trustworthy: below 4 it + // underflows to ~252, above 60 it walks off the end of msg[]. + uint8_t msg_len = (raw_len < PACKET_HEADER_LEN) ? 0 : (uint8_t)(raw_len - PACKET_HEADER_LEN); + if (msg_len > sizeof(RX_DATA.msg)) { + msg_len = sizeof(RX_DATA.msg); + } + RX_DATA.len = msg_len; + + for (uint8_t idx = 0; idx < msg_len; idx++) { + RX_DATA.msg[idx] = spi_read(); + } + spi_rfm69_select(false); + set_rfm69_idle(); + + return RX_DATA; +} + +// --------------------------------------------------------------------------- +// 4. Acknowledged send protocol +// +// Every counts packet ends in a 3-byte hash of its payload. The base station +// echoes that hash back in its reply, so a reply is accepted only when the +// echoed hash matches what we sent and the addresses are ours reversed. +// --------------------------------------------------------------------------- + +#define SEND_ACK_ATTEMPTS 10 +#define ACK_WAIT_MS 50 + +static bool reply_acknowledges(const tx_rx_data_struct* tx_data) +{ + bool hash_echo_matches = (tx_data->msg[57] == RX_DATA.msg[0]) + && (tx_data->msg[58] == RX_DATA.msg[1]) && (tx_data->msg[59] == RX_DATA.msg[2]); + bool addresses_are_ours_reversed + = (tx_data->from == RX_DATA.to) && (tx_data->to == RX_DATA.from); + return hash_echo_matches && addresses_are_ours_reversed; +} + +DATA_SEND_STATUS send_message(tx_rx_data_struct tx_data) +{ + rfm69_write_msg(tx_data); + + for (uint8_t attempt = 0; attempt < SEND_ACK_ATTEMPTS; attempt++) { + if (!wait_rx_payload_ready_timeout(ACK_WAIT_MS)) { + continue; + } + + RX_DATA = rfm69_read_msg(); + LOG("RX DATA\n"); +#if DO_UART + uart_print_tx_rx_data(RX_DATA); +#endif + + if (!reply_acknowledges(&tx_data)) { + LOG(" RX DATA ANOTHER ERROR\n"); + continue; + } + + if ((RX_DATA.flags == MSG_RECV_COUNTS_SUCCESS) && (RX_DATA.msg[3] == 0xFF)) { + LOG(" RX DATA SUCCESS\n"); + return DATA_SEND_SUCCESS; + } + LOG(" RX DATA FAILED\n"); + } + return DATA_NOT_SENT; +} + +// --------------------------------------------------------------------------- +// 5. Wheel-counts packet builder and hashes +// +// 60-byte msg layout: +// [0..9] name (padded) +// [10..19] wheel diameter (padded) +// [20..21] battery reading, little endian +// [22..26] timestamp: minute, hour, day, month, year +// [27..56] 15 x uint16 per-minute counts, little endian +// [57..59] 24-bit hash of bytes 0..56 +// --------------------------------------------------------------------------- + +tx_rx_data_struct generate_wheel_counts_message( + identifier_results idd, time_struct time, uint16_t battery_value, volatile uint16_t counts[15]) +{ + reset_txrx_struct(&TX_DATA); + memcpy(TX_DATA.msg, idd.name_str, MIN(10, idd.name_len)); + memcpy(TX_DATA.msg + 10, idd.diameter_str, MIN(10, idd.diameter_len)); + + TX_DATA.msg[20] = battery_value & 0xFF; + TX_DATA.msg[21] = (battery_value >> 8) & 0xFF; + + TX_DATA.msg[22] = time.Minute; + TX_DATA.msg[23] = time.Hour; + TX_DATA.msg[24] = time.Day; + TX_DATA.msg[25] = time.Month; + TX_DATA.msg[26] = time.Year; + + for (uint8_t idx = 0; idx < 15; idx++) { + TX_DATA.msg[26 + (2 * idx + 1)] = counts[idx] & 0xFF; // LSB first + TX_DATA.msg[26 + (2 * idx + 2)] = (counts[idx] >> 8) & 0xFF; // MSB second + } + + uint32_t msg_hash = hash_3bytes(TX_DATA.msg, 57); + TX_DATA.msg[57] = msg_hash & 0xFF; + TX_DATA.msg[58] = (msg_hash >> 8) & 0xFF; + TX_DATA.msg[59] = (msg_hash >> 16) & 0xFF; + + TX_DATA.len = sizeof(TX_DATA.msg); + TX_DATA.flags = MSG_SEND_COUNTS; + TX_DATA.from = idd.hashed; + TX_DATA.to = 255; + TX_DATA.dtype = MSG_TYPE_BINARY; + return TX_DATA; +} + +// 24-bit payload checksum carried in the last three message bytes +uint32_t hash_3bytes(unsigned const char* str, uint8_t str_len) +{ + uint32_t hash = 0; + + for (uint8_t i = 0; i < str_len; i++) { + hash = (hash * 31 + str[i]) % 0xFFFFFF; + } + return hash; +} + +// Hash a NUL-terminated string into [min, max]; used to derive the node's +// radio address from its name. +uint8_t hash(const char* str, uint8_t min, uint8_t max) +{ + unsigned int hash = 0; + while (*str) { + hash = (hash * 31) + (unsigned char)(*str); + str++; + } + + unsigned int range = max - min + 1; + return (hash % range) + min; +} + +void uart_print_tx_rx_data(tx_rx_data_struct tx_rx_print) +{ + DATA_BUFFER_7[0] = tx_rx_print.len; + DATA_BUFFER_7[1] = tx_rx_print.to; + DATA_BUFFER_7[2] = tx_rx_print.from; + DATA_BUFFER_7[3] = tx_rx_print.dtype; + DATA_BUFFER_7[4] = tx_rx_print.flags; + uart_sendString(" "); + uart_print_uint8_array(DATA_BUFFER_7, 5, "LEN,TO,FROM,DTYPE,FLAGS\n"); + uart_sendString(" "); + uart_sendStringArray(tx_rx_print.msg, 20); + uart_sendChar('\n'); + uart_sendString(" "); + uart_print_uint8_array(tx_rx_print.msg, tx_rx_print.len, "\n"); +} + +// --------------------------------------------------------------------------- +// 6. Radio configuration +// --------------------------------------------------------------------------- + void rfm69_init(void) { reset_rfm69(); _delay_ms(100); set_rfm69_idle(); + + // Carrier: 434.0 MHz (see the VAL_FREQ_* derivation in rfm69.h) spi_write_rfm69_rt(REG_FREQ_MSB, VAL_FREQ_433MHz_MSB); spi_write_rfm69_rt(REG_FREQ_MIDDLE_SB, VAL_FREQ_433MHz_MID_SB); spi_write_rfm69_rt(REG_FREQ_LSB, VAL_FREQ_433MHz_LSB); - spi_write_rfm69_rt( - REG_FIFO_THRESH, - VAL_TX_START_FIFO_NOT_EMPTY | VAL_FIFO_LEVEL_INTERRUPT); // TX condition - spi_write_rfm69_rt(REG_TEST_DAGC, - VAL_TEST_DAGC_DEFAULT); // Fading margin improvement + // Start transmitting as soon as the FIFO has data (rfm69_write_msg relies + // on filling the FIFO in standby because of this) + spi_write_rfm69_rt(REG_FIFO_THRESH, VAL_TX_START_FIFO_NOT_EMPTY | VAL_FIFO_LEVEL_INTERRUPT); + spi_write_rfm69_rt(REG_TEST_DAGC, VAL_TEST_DAGC_DEFAULT); // Fading margin improvement + // 2-byte sync word shared with the base station char sync_words[] = { 0x2d, 0xd4 }; spi_write_rfm69_multiple_rt(REG_SYNC_VALUE_1, sync_words, 2); spi_write_rfm69_rt(REG_SYNC_CONFIG, VAL_SYNCWORDS_ON | VAL_SYNCWORDS_SIZE_2_BYTES); - spi_write_rfm69_rt(REG_DATA_MODUL, - VAL_DATA_PACKET_MODE | VAL_DATA_MODUL_FSK - | VAL_MODUL_SHAPING_GAUSS_BT_1_0); // RegDataModul - - spi_write_rfm69_rt(REG_BITRATE_MSB, - VAL_BITRATE_250kbps_MSB); // RegBitrateMSB - spi_write_rfm69_rt(REG_BITRATE_LSB, - VAL_BITRATE_250kbps_LSB); // RegbBitrateLSB - spi_write_rfm69_rt(REG_FDEV_MSB, VAL_FDEV_MSB); // RegFdevMSB (0x05) - spi_write_rfm69_rt(REG_FDEV_LSB, VAL_FDEV_LSB); // RegFdevLSB (0x06) - - spi_write_rfm69_rt(REG_RX_BW, 0xE0); // RegRxBw - spi_write_rfm69_rt(REG_AFC_BW, 0xE0); // RegAfcBw - + // FSK packet mode, Gaussian shaping, 250 kbps, 25 kHz deviation spi_write_rfm69_rt( - REG_PACKET_CONFIG_1, - VAL_PACKET_VARIABLE_LENGTH | VAL_PACKET_WHITENING | VAL_PACKET_CRCON); // RegPacketConfig1 + REG_DATA_MODUL, VAL_DATA_PACKET_MODE | VAL_DATA_MODUL_FSK | VAL_MODUL_SHAPING_GAUSS_BT_1_0); + spi_write_rfm69_rt(REG_BITRATE_MSB, VAL_BITRATE_250kbps_MSB); + spi_write_rfm69_rt(REG_BITRATE_LSB, VAL_BITRATE_250kbps_LSB); + spi_write_rfm69_rt(REG_FDEV_MSB, VAL_FDEV_MSB); + spi_write_rfm69_rt(REG_FDEV_LSB, VAL_FDEV_LSB); - spi_write_rfm69_rt(REG_PREAMBLE_MSB, 0x00); // RegPreambleMSB - spi_write_rfm69_rt(REG_PREAMBLE_LSB, 0x04); // RegPreambleLSB + // Widest RX/AFC bandwidth settings + spi_write_rfm69_rt(REG_RX_BW, 0xE0); + spi_write_rfm69_rt(REG_AFC_BW, 0xE0); - spi_write_rfm69_rt(REG_PA_LEVEL, - VAL_PA_PA1_ON | VAL_PA_PA2_ON | VAL_PA_20dB); // RegPaLevel + // Variable-length packets with whitening and CRC + spi_write_rfm69_rt( + REG_PACKET_CONFIG_1, VAL_PACKET_VARIABLE_LENGTH | VAL_PACKET_WHITENING | VAL_PACKET_CRCON); + + // 4-byte preamble + spi_write_rfm69_rt(REG_PREAMBLE_MSB, 0x00); + spi_write_rfm69_rt(REG_PREAMBLE_LSB, 0x04); + + // Both PA stages on, maximum output power + spi_write_rfm69_rt(REG_PA_LEVEL, VAL_PA_PA1_ON | VAL_PA_PA2_ON | VAL_PA_20dB); } diff --git a/avr_code/spi.c b/avr_code/spi.c index e89f1c9..af2e326 100644 --- a/avr_code/spi.c +++ b/avr_code/spi.c @@ -1,26 +1,18 @@ #include "spi.h" - - +// RFM69 chip select (SS1/PE2, active low) void spi_rfm69_select(bool state) { SET_PIN_OUT(DDRE, DDE2); - if (!state) { - SET_PIN_HIGH(PORTE, PE2); - } else { - SET_PIN_LOW(PORTE, PE2); - } + SET_PIN_TO(PORTE, PE2, !state); } +uint8_t spi_write(uint8_t data) +{ + SPDR1 = data; // Load data into the SPI data register + while (!(SPSR1 & (1 << SPIF1))) { }; // Wait for transmission to complete + return SPDR1; // Return received data +} - uint8_t spi_write(uint8_t data) { - SPDR1 = data; // Load data into the SPI data register - while (!(SPSR1 & (1 << SPIF1))) { - }; // Wait for transmission to complete - return SPDR1; // Return received data - } - - uint8_t spi_read(void) { - return spi_write(0xFF); - } +uint8_t spi_read(void) { return spi_write(0xFF); } diff --git a/avr_code/spi.h b/avr_code/spi.h index ff6583a..5b9f4cd 100644 --- a/avr_code/spi.h +++ b/avr_code/spi.h @@ -1,11 +1,10 @@ -#include #include "defines.h" #include "states.h" +#include #include #ifndef SPI_H #define SPI_H - uint8_t spi_write(uint8_t data); uint8_t spi_read(void); void spi_rfm69_select(bool state); diff --git a/avr_code/st25dv.c b/avr_code/st25dv.c index dd3e82d..13c3b49 100644 --- a/avr_code/st25dv.c +++ b/avr_code/st25dv.c @@ -1,9 +1,13 @@ +// ST25DV NFC tag driver. The tag holds a single NDEF text record of the form +// ",", which get_nugget_data() parses into IDENTIFIER. + #include "st25dv.h" #define IDENT_NAME_MAX (sizeof(IDENTIFIER.name_str) - 1) #define IDENT_DIAM_MAX (sizeof(IDENTIFIER.diameter_str) - 1) -static void set_identifier(const char* name, uint8_t name_len, const char* diam, uint8_t diam_len) { +static void set_identifier(const char* name, uint8_t name_len, const char* diam, uint8_t diam_len) +{ if (name_len > IDENT_NAME_MAX) { name_len = IDENT_NAME_MAX; } @@ -21,7 +25,8 @@ static void set_identifier(const char* name, uint8_t name_len, const char* diam, IDENTIFIER.hashed = hash(IDENTIFIER.name_str, 0, 59); } -identifier_results get_nugget_data(void) { +identifier_results get_nugget_data(void) +{ NDEF_MSG = rfid_read_first_ndef_entry(); @@ -52,7 +57,8 @@ identifier_results get_nugget_data(void) { return IDENTIFIER; } -trimmed_string_struct remove_spaces(char* str, uint8_t len_str) { +trimmed_string_struct remove_spaces(char* str, uint8_t len_str) +{ const uint8_t max_len = sizeof(TRIMMED_STRING.str) - 1; uint8_t j = 0; @@ -69,16 +75,15 @@ trimmed_string_struct remove_spaces(char* str, uint8_t len_str) { return TRIMMED_STRING; } -void rfid_set_low_power_down(bool state) { +// LPD pin: high puts the tag's I2C interface into low-power mode +void rfid_set_low_power_down(bool state) +{ SET_PIN_OUT(DDRD, DDD5); - if (state) { - SET_PIN_HIGH(PORTD, PD5); - } else { - SET_PIN_LOW(PORTD, PD5); - } + SET_PIN_TO(PORTD, PD5, state); } -ndef_message rfid_read_first_ndef_entry(void) { +ndef_message rfid_read_first_ndef_entry(void) +{ rfid_set_low_power_down(false); rfid_set_i2c_power(true); _delay_ms(1); @@ -91,26 +96,25 @@ ndef_message rfid_read_first_ndef_entry(void) { NDEF_MSG = readNDEFText(DATA_BUFFER_INTERNAL, NDEF_READ_LEN); - rfid_set_low_power_down(true); rfid_set_i2c_power(false); return NDEF_MSG; } -uint8_t rfid_read_system_register(void) { +uint8_t rfid_read_system_register(void) +{ return read_one_byte_16bit_addr_no_err_register(I2C_SYSTEM_ADDR, 0x0000); } -void rfid_set_i2c_power(bool state) { +// Switched supply for the tag's I2C side +void rfid_set_i2c_power(bool state) +{ SET_PIN_OUT(DDRE, DDE0); - if (state) { - SET_PIN_HIGH(PORTE, PE0); - } else { - SET_PIN_LOW(PORTE, PE0); - } + SET_PIN_TO(PORTE, PE0, state); } -uint8_t rfid_read_memory(uint8_t* data, uint8_t num_bytes, uint16_t address) { +uint8_t rfid_read_memory(uint8_t* data, uint8_t num_bytes, uint16_t address) +{ return read_n_bytes_16bit_addr(I2C_USER_ADDR, address, data, num_bytes); } diff --git a/avr_code/st25dv.h b/avr_code/st25dv.h index 0478155..89937cf 100644 --- a/avr_code/st25dv.h +++ b/avr_code/st25dv.h @@ -1,15 +1,13 @@ -#include "i2c.h" #include "defines.h" +#include "i2c.h" #include "ndef.h" +#include "rfm69.h" #include "states.h" #include -#include "rfm69.h" #include #ifndef ST25DV_H #define ST25DV_H - - #define I2C_SYSTEM_ADDR 0x57 #define I2C_USER_ADDR 0x53 diff --git a/avr_code/states.c b/avr_code/states.c index 5c40b21..6604c26 100644 --- a/avr_code/states.c +++ b/avr_code/states.c @@ -1,61 +1,52 @@ +// GPIO helpers: every board control line lives here (except the two chip +// selects, which stay with their SPI drivers). Each helper sets the pin's +// direction on every call so it works no matter what ran before it. + #include "states.h" - void init_spi(void) { - SET_PIN_OUT(DDRC, DDC1); // SCK1 - SET_PIN_OUT(DDRE, DDE3); // MOSI1 - SET_PIN_IN(DDRC, DDC0); // MISO1 (driven by the slave; no pull-up) +void init_spi(void) +{ + SET_PIN_OUT(DDRC, DDC1); // SCK1 + SET_PIN_OUT(DDRE, DDE3); // MOSI1 + SET_PIN_IN(DDRC, DDC0); // MISO1 (driven by the slave; no pull-up) - // SS1 must be an output before SPE is set. If it is left as an input and - // reads low, the hardware clears MSTR and the port silently stops being - // a master. - SET_PIN_OUT(DDRE, DDE2); - SET_PIN_HIGH(PORTE, PE2); + // SS1 must be an output before SPE is set. If it is left as an input and + // reads low, the hardware clears MSTR and the port silently stops being a + // master. + SET_PIN_OUT(DDRE, DDE2); + SET_PIN_HIGH(PORTE, PE2); - SPCR1 = (1 << SPE1) | (1 << MSTR1); // Enable, Master, SPR1:0 = 00 -> f_osc/4 - } - - - void rfm69_reset_state(bool state) { - SET_PIN_OUT(DDRC, DDC2); - if (state) { - SET_PIN_HIGH(PORTC, PC2); - } else { - SET_PIN_LOW(PORTC, PC2); - } - } + SPCR1 = (1 << SPE1) | (1 << MSTR1); // Enable, Master, SPR1:0 = 00 -> f_osc/4 +} - void led_1_set_state(bool state) { - SET_PIN_OUT(DDRD, DDD4); - if (state) { - SET_PIN_HIGH(PORTD, PD4); - } else { - SET_PIN_LOW(PORTD, PD4); - } - } +// RFM69 reset line: high holds the radio in reset +void rfm69_reset_state(bool state) +{ + SET_PIN_OUT(DDRC, DDC2); + SET_PIN_TO(PORTC, PC2, state); +} - void led_2_set_state(bool state) { - SET_PIN_OUT(DDRD, DDD6); - if (state) { - SET_PIN_HIGH(PORTD, PD6); - } else { - SET_PIN_LOW(PORTD, PD6); - } - } +void led_1_set_state(bool state) +{ + SET_PIN_OUT(DDRD, DDD4); + SET_PIN_TO(PORTD, PD4, state); +} - void led_3_set_state(bool state) { - SET_PIN_OUT(DDRD, DDD7); - if (state) { - SET_PIN_HIGH(PORTD, PD7); - } else { - SET_PIN_LOW(PORTD, PD7); - } - } +void led_2_set_state(bool state) +{ + SET_PIN_OUT(DDRD, DDD6); + SET_PIN_TO(PORTD, PD6, state); +} - void ldo_set_state(bool state) { - SET_PIN_OUT(DDRC, DDC3); - if (state) { - SET_PIN_HIGH(PORTC, PC3); - } else { - SET_PIN_LOW(PORTC, PC3); - } - } +void led_3_set_state(bool state) +{ + SET_PIN_OUT(DDRD, DDD7); + SET_PIN_TO(PORTD, PD7, state); +} + +// Enable line of the LDO that powers the radio and EEPROM +void ldo_set_state(bool state) +{ + SET_PIN_OUT(DDRC, DDC3); + SET_PIN_TO(PORTC, PC3, state); +} diff --git a/avr_code/states.h b/avr_code/states.h index e57b09c..af58220 100644 --- a/avr_code/states.h +++ b/avr_code/states.h @@ -1,4 +1,4 @@ -/* +/* * File: states.h * Author: thebears * @@ -6,39 +6,36 @@ */ #ifndef STATES_H -#define STATES_H +#define STATES_H - -#include #include +#include -#define SET_PIN_OUT(DDR, PIN) ((DDR) |= (1 << (PIN))) // Set pin as output -#define SET_PIN_IN(DDR, PIN) ((DDR) &= ~(1 << (PIN))) // Set pin as input +#define SET_PIN_OUT(DDR, PIN) ((DDR) |= (1 << (PIN))) // Set pin as output +#define SET_PIN_IN(DDR, PIN) ((DDR) &= ~(1 << (PIN))) // Set pin as input -#define SET_PIN_HIGH(PORT, PIN) ((PORT) |= (1 << (PIN))) // Set pin high -#define SET_PIN_LOW(PORT, PIN) ((PORT) &= ~(1 << (PIN))) // Set pin low +#define SET_PIN_HIGH(PORT, PIN) ((PORT) |= (1 << (PIN))) // Set pin high +#define SET_PIN_LOW(PORT, PIN) ((PORT) &= ~(1 << (PIN))) // Set pin low +// Drive a pin to a boolean level +#define SET_PIN_TO(PORT, PIN, level) ((level) ? SET_PIN_HIGH(PORT, PIN) : SET_PIN_LOW(PORT, PIN)) - -#ifdef __cplusplus +#ifdef __cplusplus extern "C" { #endif - void init_spi(void); - void rfm69_reset_state(bool state) ; - void led_1_set_state(bool state); +void init_spi(void); +void rfm69_reset_state(bool state); +void led_1_set_state(bool state); - void led_2_set_state(bool state); +void led_2_set_state(bool state); - void led_3_set_state(bool state); +void led_3_set_state(bool state); - void ldo_set_state(bool state); +void ldo_set_state(bool state); - - -#ifdef __cplusplus +#ifdef __cplusplus } #endif -#endif /* STATES_H */ - +#endif /* STATES_H */