fixes

avr_code/adc.c

@@ -22,9 +22,20 @@ int8_t adc_Initialize(void)
     return 0;
 }
 
-void adc_Disable(void) { ADCSRA &= ~(1 << ADEN); }
+// Power (PRR clock gate) and ADEN are managed together, so the ADC draws
+// nothing between readings. Enable rewrites the full config because register
+// access is unreliable while the clock is gated.
+void adc_Disable(void)
+{
+    ADCSRA &= ~(1 << ADEN);
+    power_adc_disable();
+}
 
-void adc_Enable(void) { ADCSRA |= (1 << ADEN); }
+void adc_Enable(void)
+{
+    power_adc_enable();
+    ADCSRA = (1 << ADEN) | ADC_PRESCALER_64;
+}
 
 void adc_StartConversion(uint8_t channel)
 {