⚡️ Controller Fan software PWM (etc.) (#23102)
Co-authored-by: Scott Lahteine <thinkyhead@users.noreply.github.com>
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@@ -211,32 +211,32 @@ enum ClockSource2 : char {
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// Set Clock Select bits
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// Ex: SET_CS3(PRESCALER_64);
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#ifdef TCCR2
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#define HAS_TCCR2 1
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#endif
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#define _SET_CS(T,V) (TCCR##T##B = (TCCR##T##B & ~(0x7 << CS##T##0)) | ((int(V) & 0x7) << CS##T##0))
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#define _SET_CS0(V) _SET_CS(0,V)
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#define _SET_CS1(V) _SET_CS(1,V)
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#ifdef TCCR2
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#define _SET_CS2(V) (TCCR2 = (TCCR2 & ~(0x7 << CS20)) | (int(V) << CS20))
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#else
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#define _SET_CS2(V) _SET_CS(2,V)
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#endif
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#define _SET_CS3(V) _SET_CS(3,V)
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#define _SET_CS4(V) _SET_CS(4,V)
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#define _SET_CS5(V) _SET_CS(5,V)
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#define SET_CS0(V) _SET_CS0(CS_##V)
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#define SET_CS1(V) _SET_CS1(CS_##V)
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#ifdef TCCR2
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#if HAS_TCCR2
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#define _SET_CS2(V) (TCCR2 = (TCCR2 & ~(0x7 << CS20)) | (int(V) << CS20))
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#define SET_CS2(V) _SET_CS2(CS2_##V)
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#else
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#define _SET_CS2(V) _SET_CS(2,V)
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#define SET_CS2(V) _SET_CS2(CS_##V)
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#endif
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#define SET_CS3(V) _SET_CS3(CS_##V)
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#define SET_CS4(V) _SET_CS4(CS_##V)
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#define SET_CS5(V) _SET_CS5(CS_##V)
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#define SET_CS(T,V) SET_CS##T(V)
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// Runtime (see set_pwm_frequency)
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#define _SET_CSn(TCCRnQ, V) do{ \
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(*(TCCRnQ)[1] = (*(TCCRnQ[1]) & ~(0x7 << 0)) | ((int(V) & 0x7) << 0)); \
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}while(0)
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#define _SET_CSn(TCCRnQ, V) (*(TCCRnQ)[1] = (*(TCCRnQ[1]) & ~(0x7 << 0)) | ((int(V) & 0x7) << 0))
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// Set Compare Mode bits
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// Ex: SET_COMS(4,CLEAR_SET,CLEAR_SET,CLEAR_SET);
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@@ -247,21 +247,15 @@ enum ClockSource2 : char {
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#define SET_COMC(T,V) SET_COM(T,C,V)
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#define SET_COMS(T,V1,V2,V3) do{ SET_COMA(T,V1); SET_COMB(T,V2); SET_COMC(T,V3); }while(0)
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// Runtime (see set_pwm_duty)
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#define _SET_COMnQ(TCCRnQ, Q, V) do{ \
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(*(TCCRnQ)[0] = (*(TCCRnQ)[0] & ~(0x3 << (6-2*(Q)))) | (int(V) << (6-2*(Q)))); \
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}while(0)
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#define _SET_COMnQ(TCCRnQ, Q, V) (*(TCCRnQ)[0] = (*(TCCRnQ)[0] & ~(0x3 << (6-2*(Q)))) | (int(V) << (6-2*(Q))))
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// Set OCRnQ register
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// Runtime (see set_pwm_duty):
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#define _SET_OCRnQ(OCRnQ, Q, V) do{ \
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(*(OCRnQ)[(Q)] = (0x0000) | (int(V) & 0xFFFF)); \
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}while(0)
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#define _SET_OCRnQ(OCRnQ, Q, V) (*(OCRnQ)[Q] = int(V) & 0xFFFF)
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// Set ICRn register (one per timer)
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// Runtime (see set_pwm_frequency)
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#define _SET_ICRn(ICRn, V) do{ \
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(*(ICRn) = (0x0000) | (int(V) & 0xFFFF)); \
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}while(0)
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#define _SET_ICRn(ICRn, V) (*(ICRn) = int(V) & 0xFFFF)
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// Set Noise Canceler bit
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// Ex: SET_ICNC(2,1)
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