From 8989353fabf82ac809d5d4db72b23324ec3b7669 Mon Sep 17 00:00:00 2001 From: Ryan V1 <55478432+V1EngineeringInc@users.noreply.github.com> Date: Sun, 4 Oct 2020 15:41:41 -0700 Subject: [PATCH] Fix Archim1 stepper timing (with new variant) (#19596) --- buildroot/share/PlatformIO/boards/archim.json | 59 ++ .../PlatformIO/variants/archim/.gitignore | 2 + .../variants/archim/build_gcc/Makefile | 42 ++ .../variants/archim/build_gcc/debug.mk | 25 + .../variants/archim/build_gcc/gcc.mk | 82 +++ .../build_gcc/libvariant_arduino_due_x.mk | 184 ++++++ .../variants/archim/build_gcc/release.mk | 25 + .../debug_scripts/gcc/arduino_due_x_flash.gdb | 37 ++ .../debug_scripts/gcc/arduino_due_x_sram.gdb | 37 ++ .../debug_scripts/iar/arduino_due_flash.mac | 44 ++ .../debug_scripts/iar/arduino_due_sram.mac | 44 ++ .../variants/archim/libsam_sam3x8e_gcc_rel.a | Bin 0 -> 117430 bytes .../archim/libsam_sam3x8e_gcc_rel.a.txt | 576 ++++++++++++++++++ .../archim/linker_scripts/gcc/flash.ld | 146 +++++ .../archim/linker_scripts/gcc/sram.ld | 145 +++++ .../archim/linker_scripts/iar/flash.icf | 49 ++ .../archim/linker_scripts/iar/sram.icf | 33 + .../PlatformIO/variants/archim/pins_arduino.h | 21 + .../PlatformIO/variants/archim/variant.cpp | 485 +++++++++++++++ .../PlatformIO/variants/archim/variant.h | 284 +++++++++ platformio.ini | 2 + 21 files changed, 2322 insertions(+) create mode 100644 buildroot/share/PlatformIO/boards/archim.json create mode 100644 buildroot/share/PlatformIO/variants/archim/.gitignore create mode 100644 buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile create mode 100644 buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk create mode 100644 buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk create mode 100644 buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk create mode 100644 buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk create mode 100644 buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb create mode 100644 buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb create mode 100644 buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac create mode 100644 buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac create mode 100644 buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a create mode 100644 buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a.txt create mode 100644 buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld create mode 100644 buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld create mode 100644 buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf create mode 100644 buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf create mode 100644 buildroot/share/PlatformIO/variants/archim/pins_arduino.h create mode 100644 buildroot/share/PlatformIO/variants/archim/variant.cpp create mode 100644 buildroot/share/PlatformIO/variants/archim/variant.h diff --git a/buildroot/share/PlatformIO/boards/archim.json b/buildroot/share/PlatformIO/boards/archim.json new file mode 100644 index 0000000000..60035197f2 --- /dev/null +++ b/buildroot/share/PlatformIO/boards/archim.json @@ -0,0 +1,59 @@ +{ + "build": { + "core": "arduino", + "cpu": "cortex-m3", + "extra_flags": "-D__SAM3X8E__ -DARDUINO_ARCH_SAM -DARDUINO_SAM_DUE", + "f_cpu": "84000000L", + "hwids": [ + [ + "0x27B1", + "0x0001" + ], + [ + "0x2341", + "0x003E" + ], + [ + "0x2341", + "0x003D" + ] + ], + "ldscript": "linker_scripts/gcc/flash.ld", + "mcu": "at91sam3x8e", + "usb_product": "Archim", + "variant": "archim" + }, + "connectivity": [ + "can" + ], + "debug": { + "jlink_device": "ATSAM3X8E", + "openocd_chipname": "at91sam3X8E", + "openocd_target": "at91sam3XXX", + "svd_path": "ATSAM3X8E.svd" + }, + "frameworks": [ + "arduino", + "simba" + ], + "name": "Archim", + "upload": { + "disable_flushing": true, + "maximum_ram_size": 98304, + "maximum_size": 524288, + "native_usb": true, + "protocol": "sam-ba", + "protocols": [ + "sam-ba", + "jlink", + "blackmagic", + "atmel-ice", + "stlink" + ], + "require_upload_port": true, + "use_1200bps_touch": true, + "wait_for_upload_port": true + }, + "url": "https://ultimachine.com", + "vendor": "UltiMachine" +} diff --git a/buildroot/share/PlatformIO/variants/archim/.gitignore b/buildroot/share/PlatformIO/variants/archim/.gitignore new file mode 100644 index 0000000000..2827c7d4f0 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/.gitignore @@ -0,0 +1,2 @@ +# Exception for libsam +!libsam_sam3x8e_gcc_rel.a diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile b/buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile new file mode 100644 index 0000000000..4332f36080 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile @@ -0,0 +1,42 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables --no-print-directory + +#------------------------------------------------------------------------------- +# Rules +#------------------------------------------------------------------------------- + +all: arduino_due_x + +.PHONY: arduino_due_x +arduino_due_x: + @echo ------------------------------------------------------------------------------------ + @echo --- Making variant arduino_due_x + @$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk +# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk + @echo ------------------------------------------------------------------------------------ + +.PHONY: clean +clean: + @echo ------------------------------------------------------------------------------------ + @echo --- Cleaning variant arduino_due_x + @$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@ +# @$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@ + @echo ------------------------------------------------------------------------------------ + diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk new file mode 100644 index 0000000000..d0716744a7 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk @@ -0,0 +1,25 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Optimization level +# -O1 Optimize +# -O2 Optimize even more +# -O3 Optimize yet more +# -O0 Reduce compilation time and make debugging produce the expected results +# -Os Optimize for size +OPTIMIZATION = -g -O0 -DDEBUG diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk new file mode 100644 index 0000000000..32f35d264c --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk @@ -0,0 +1,82 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Tool suffix when cross-compiling +CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi- + +# Compilation tools +AR = $(CROSS_COMPILE)ar +CC = $(CROSS_COMPILE)gcc +CXX = $(CROSS_COMPILE)g++ +AS = $(CROSS_COMPILE)as +NM = $(CROSS_COMPILE)nm +ifeq ($(OS),Windows_NT) +RM=cs-rm -Rf +else +RM=rm -Rf +endif + +SEP=\\ + +# --------------------------------------------------------------------------------------- +# C Flags + +CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int +CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses +CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused +CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef +CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings +CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes +CFLAGS += -Wmissing-prototypes -Wmissing-declarations +CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations +CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long +CFLAGS += -Wunreachable-code +CFLAGS += -Wcast-align +#CFLAGS += -Wmissing-noreturn +#CFLAGS += -Wconversion + +CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -nostdlib -std=c99 +CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) -D$(VARIANT) + +# To reduce application size use only integer printf function. +CFLAGS += -Dprintf=iprintf + +# --------------------------------------------------------------------------------------- +# CPP Flags + +CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 +CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code +CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused +CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef +CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings +CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations +CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations +CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long +#CPPFLAGS += -Wmissing-noreturn +#CPPFLAGS += -Wconversion + +CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -std=c++98 +CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) + +# To reduce application size use only integer printf function. +CPPFLAGS += -Dprintf=iprintf + +# --------------------------------------------------------------------------------------- +# ASM Flags + +ASFLAGS = -mcpu=cortex-m3 -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES) diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk new file mode 100644 index 0000000000..3f8b1b7603 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk @@ -0,0 +1,184 @@ +# +# Copyright (c) 2012 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Makefile for compiling libArduino +.SUFFIXES: .o .a .c .s + +CHIP=__SAM3X8E__ +VARIANT=arduino_due_x +LIBNAME=libvariant_$(VARIANT) +TOOLCHAIN=gcc + +#------------------------------------------------------------------------------- +# Path +#------------------------------------------------------------------------------- + +# Output directories +OUTPUT_BIN = ../../../cores/arduino + +# Libraries +PROJECT_BASE_PATH = .. +SYSTEM_PATH = ../../../system +CMSIS_ROOT_PATH = $(SYSTEM_PATH)/CMSIS +CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include +CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL +#CMSIS_CHIP_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(CHIP_SERIE) + +ARDUINO_PATH = ../../../cores/arduino +VARIANT_BASE_PATH = ../../../variants +VARIANT_PATH = ../../../variants/$(VARIANT) + +#------------------------------------------------------------------------------- +# Files +#------------------------------------------------------------------------------- + +#vpath %.h $(PROJECT_BASE_PATH) $(SYSTEM_PATH) $(VARIANT_PATH) +vpath %.cpp $(PROJECT_BASE_PATH) + +VPATH+=$(PROJECT_BASE_PATH) + +INCLUDES = +#INCLUDES += -I$(PROJECT_BASE_PATH) +INCLUDES += -I$(ARDUINO_PATH) +INCLUDES += -I$(ARDUINO_PATH)/USB +INCLUDES += -I$(SYSTEM_PATH) +INCLUDES += -I$(SYSTEM_PATH)/libsam +INCLUDES += -I$(SYSTEM_PATH)/USBHost +INCLUDES += -I$(VARIANT_BASE_PATH) +INCLUDES += -I$(VARIANT_PATH) +INCLUDES += -I$(CMSIS_ARM_PATH) +INCLUDES += -I$(CMSIS_ATMEL_PATH) + +#------------------------------------------------------------------------------- +ifdef DEBUG +include debug.mk +else +include release.mk +endif + +#------------------------------------------------------------------------------- +# Tools +#------------------------------------------------------------------------------- + +include $(TOOLCHAIN).mk + +#------------------------------------------------------------------------------- +ifdef DEBUG +OUTPUT_OBJ=debug +OUTPUT_LIB_POSTFIX=dbg +else +OUTPUT_OBJ=release +OUTPUT_LIB_POSTFIX=rel +endif + +OUTPUT_LIB=$(LIBNAME)_$(TOOLCHAIN)_$(OUTPUT_LIB_POSTFIX).a +OUTPUT_PATH=$(OUTPUT_OBJ)_$(VARIANT) + +#------------------------------------------------------------------------------- +# C source files and objects +#------------------------------------------------------------------------------- +C_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.c) + +C_OBJ_TEMP = $(patsubst %.c, %.o, $(notdir $(C_SRC))) + +# during development, remove some files +C_OBJ_FILTER= + +C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP)) + +#------------------------------------------------------------------------------- +# CPP source files and objects +#------------------------------------------------------------------------------- +CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp) + +CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC))) + +# during development, remove some files +CPP_OBJ_FILTER= + +CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP)) + +#------------------------------------------------------------------------------- +# Assembler source files and objects +#------------------------------------------------------------------------------- +A_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.s) + +A_OBJ_TEMP=$(patsubst %.s, %.o, $(notdir $(A_SRC))) + +# during development, remove some files +A_OBJ_FILTER= + +A_OBJ=$(filter-out $(A_OBJ_FILTER), $(A_OBJ_TEMP)) + +#------------------------------------------------------------------------------- +# Rules +#------------------------------------------------------------------------------- +all: $(VARIANT) + +$(VARIANT): create_output $(OUTPUT_LIB) + +.PHONY: create_output +create_output: + @echo ------------------------------------------------------------------------------------ + @echo ------------------------- + @echo --- Preparing variant $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN) + @echo ------------------------- +# @echo *$(INCLUDES) +# @echo ------------------------- +# @echo *$(C_SRC) +# @echo ------------------------- +# @echo *$(C_OBJ) +# @echo ------------------------- +# @echo *$(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) +# @echo ------------------------- +# @echo *$(CPP_SRC) +# @echo ------------------------- +# @echo *$(CPP_OBJ) +# @echo ------------------------- +# @echo *$(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) +# @echo ------------------------- +# @echo *$(A_SRC) +# @echo ------------------------- + + -@mkdir $(OUTPUT_PATH) 1>NUL 2>&1 + @echo ------------------------------------------------------------------------------------ + +$(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c +# @"$(CC)" -v -c $(CFLAGS) $< -o $@ + @"$(CC)" -c $(CFLAGS) $< -o $@ + +$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp +# @"$(CC)" -c $(CPPFLAGS) $< -o $@ + @"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@ + +$(addprefix $(OUTPUT_PATH)/,$(A_OBJ)): $(OUTPUT_PATH)/%.o: %.s + @"$(AS)" -c $(ASFLAGS) $< -o $@ + +$(OUTPUT_LIB): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ)) + @"$(AR)" -v -r "$(OUTPUT_BIN)/$@" $^ + @"$(NM)" "$(OUTPUT_BIN)/$@" > "$(OUTPUT_BIN)/$@.txt" + + +.PHONY: clean +clean: + @echo ------------------------------------------------------------------------------------ + @echo --- Cleaning $(VARIANT) files [$(OUTPUT_PATH)$(SEP)*.o] + -@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1 + -@$(RM) $(OUTPUT_BIN)/$(OUTPUT_LIB) 1>NUL 2>&1 + @echo ------------------------------------------------------------------------------------ + diff --git a/buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk b/buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk new file mode 100644 index 0000000000..0d15157f4f --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk @@ -0,0 +1,25 @@ +# +# Copyright (c) 2011 Arduino. All right reserved. +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +# Optimization level +# -O1 Optimize +# -O2 Optimize even more +# -O3 Optimize yet more +# -O0 Reduce compilation time and make debugging produce the expected results +# -Os Optimize for size +OPTIMIZATION = -Os diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb new file mode 100644 index 0000000000..4e8375b5f1 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb @@ -0,0 +1,37 @@ +#******************************************************* +# +# Connect to J-Link and debug application in flash on SAM3X. +# + +# Define 'reset' command +define reset + +# Connect to the J-Link gdb server +target remote localhost:2331 + +# Reset the chip to get to a known state +monitor reset + +# Select flash device +monitor flash device = AT91SAM3X8E + +# Enable flash download and flash breakpoints +monitor flash download = 1 + +# Load the program +load + +# Reset peripheral (RSTC_CR) +set *0x400e1a00 = 0xA5000004 + +# Initialize PC and stack pointer +mon reg sp=(0x80000) +#set *0x80004 = *0x80004 & 0xFFFFFFFE +mon reg pc=(0x80004) + +info reg + +break main + +# End of 'reset' command +end diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb new file mode 100644 index 0000000000..15a1792a91 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb @@ -0,0 +1,37 @@ +#******************************************************* +# +# Connect to J-Link and debug application in sram on SAM3X. +# + +# Define 'reset' command +define reset + +# Connect to the J-Link gdb server +target remote localhost:2331 + +# Reset the chip to get to a known state +monitor reset + +# Select flash device +monitor flash device = AT91SAM3X8E + +# Enable flash download and flash breakpoints +monitor flash download = 1 + +# Load the program +load + +# Reset peripheral (RSTC_CR) +set *0x400e1a00 = 0xA5000004 + +# Initialize PC and stack pointer +mon reg sp=(0x20000000) +#set *0x20000004 = *0x20000004 & 0xFFFFFFFE +mon reg pc=(0x20000004) + +info reg + +break main + +# End of 'reset' command +end diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac new file mode 100644 index 0000000000..959583582c --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac @@ -0,0 +1,44 @@ +// --------------------------------------------------------- +// ATMEL Microcontroller Software Support - ROUSSET - +// --------------------------------------------------------- +// The software is delivered "AS IS" without warranty or +// condition of any kind, either express, implied or +// statutory. This includes without limitation any warranty +// or condition with respect to merchantability or fitness +// for any particular purpose, or against the infringements of +// intellectual property rights of others. +// --------------------------------------------------------- +// File: at91sam3u-ek-flash.mac +// User setup file for CSPY debugger. +// --------------------------------------------------------- +__var __mac_i; +__var __mac_pt; + +/********************************************************************* +* +* execUserReset() +*/ +execUserReset() +{ + __message "------------------------------ execUserReset ---------------------------------"; + __message "-------------------------------Set PC Reset ----------------------------------"; + + __hwReset(0); + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} + +/********************************************************************* +* +* execUserPreload() +*/ +execUserPreload() +{ + __message "------------------------------ execUserPreload ---------------------------------"; + + __hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} diff --git a/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac new file mode 100644 index 0000000000..ba86029d34 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac @@ -0,0 +1,44 @@ +// --------------------------------------------------------- +// ATMEL Microcontroller Software Support - ROUSSET - +// --------------------------------------------------------- +// The software is delivered "AS IS" without warranty or +// condition of any kind, either express, implied or +// statutory. This includes without limitation any warranty +// or condition with respect to merchantability or fitness +// for any particular purpose, or against the infringements of +// intellectual property rights of others. +// --------------------------------------------------------- +// File: at91sam3u-ek-sram.mac +// User setup file for CSPY debugger. +// --------------------------------------------------------- +__var __mac_i; +__var __mac_pt; + +/********************************************************************* +* +* execUserReset() +*/ +execUserReset() +{ + __message "------------------------------ execUserReset ---------------------------------"; + __message "-------------------------------Set PC Reset ----------------------------------"; + + //__hwReset(50); + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} + +/********************************************************************* +* +* execUserPreload() +*/ +execUserPreload() +{ + __message "------------------------------ execUserPreload ---------------------------------"; + + __hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset + + // perpheral reset RSTC_CR + __writeMemory32(0xA5000004,0x400e1200,"Memory"); +} diff --git a/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a b/buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a new file mode 100644 index 0000000000000000000000000000000000000000..3e25e6cabd1e3367a2031f76fbb34cc4a1e43d44 GIT binary patch literal 117430 zcmY$iNi0gvu;bEKKm~>-CdQ`5mL}#F3JL~bDP&SX!NSti0xYbMz{SA8*uub|^N4tC z?!>?_TyTO80|TvbeG3BvDY)+s0|Ppq?!mx73|=6?z(5GE-owCvjyJDiV4xIV;9y`N z7vDX=z<`b)&tYId#;v1O|p7f*Iwk7{FL*7Xzc(1lnS|4-AaN;s6N-Mrz~u zKMah671!=yU?dfH@-Q%haBmI+<6yzd85kIG;dKrSjD+xZJqAX?IKb0C-X*g*F)1h2 zGp{7IsHn7{gaITNP@0nyS^#DSrBddn!bOb53d^TqYp3 zD6=3VwJ0$MtR^_M#51p;6rwOVwZy-)1jcjD&r8cpFD*(1D|Cm+xg?e(2A3q3lom4- z)!0Jo#iyoMMG-0UX#GIUXG#Qu%EK-@pNQ&bj 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iap_perform_command.7049 + +gpbr.o: +00000000 T gpbr_read +00000000 T gpbr_write + +ssc.o: + U memset +00000000 T ssc_disable_interrupt +00000000 T ssc_disable_rx +00000000 T ssc_disable_tx +00000000 T ssc_disable_tx_frame_sync_data +00000000 T ssc_enable_interrupt +00000000 T ssc_enable_rx +00000000 T ssc_enable_tx +00000000 T ssc_enable_tx_frame_sync_data +00000000 T ssc_get_interrupt_mask +00000000 T ssc_get_rx_access +00000000 T ssc_get_rx_compare +00000000 T ssc_get_status +00000000 T ssc_get_tx_access +00000000 T ssc_get_writeprotect_status +00000000 T ssc_i2s_set_receiver +00000000 T ssc_i2s_set_transmitter +00000000 T ssc_is_rx_enabled +00000000 T ssc_is_rx_ready +00000000 T ssc_is_tx_empty +00000000 T ssc_is_tx_enabled +00000000 T ssc_is_tx_ready +00000000 T ssc_read +00000000 T ssc_read_sync_data +00000000 T ssc_reset +00000000 T ssc_set_clock_divider +00000000 T ssc_set_loop_mode +00000000 T ssc_set_normal_mode +00000000 T ssc_set_receiver +00000000 T ssc_set_rx_compare +00000000 T ssc_set_rx_stop_selection +00000000 T ssc_set_td_default_level +00000000 T ssc_set_transmitter +00000000 T ssc_set_writeprotect +00000000 T ssc_write +00000000 T ssc_write_sync_data + +trng.o: +00000000 T trng_disable +00000000 T trng_disable_interrupt +00000000 T trng_enable +00000000 T trng_enable_interrupt +00000000 T trng_get_interrupt_mask +00000000 T trng_get_interrupt_status +00000000 T trng_read_output_data + +rstc.o: +00000000 T rstc_disable_user_reset +00000000 T rstc_disable_user_reset_interrupt +00000000 T rstc_enable_user_reset +00000000 T rstc_enable_user_reset_interrupt +00000000 T rstc_get_reset_cause +00000000 T rstc_get_status +00000000 T rstc_reset_extern +00000000 T rstc_set_external_reset +00000000 T rstc_start_software_reset + +emac.o: +00000000 t circ_inc +00000000 T emac_dev_get_tx_load +00000000 T emac_dev_init +00000000 T emac_dev_read +00000000 T emac_dev_reset +00000000 T emac_dev_set_rx_callback +00000000 T emac_dev_set_tx_wakeup_callback +00000000 T emac_dev_write +00000000 T emac_handler +00000000 T emac_phy_read +00000000 T emac_phy_write +00000000 t emac_reset_rx_mem +00000000 t emac_reset_tx_mem +00000000 b gs_rx_desc +00000000 b gs_tx_callback +00000000 b gs_tx_desc +00000000 b gs_uc_rx_buffer +00000000 b gs_uc_tx_buffer + U memcpy diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld new file mode 100644 index 0000000000..53f2b5f1f5 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld @@ -0,0 +1,146 @@ +/* ---------------------------------------------------------------------------- + * SAM Software Package License + * ---------------------------------------------------------------------------- + * Copyright (c) 2012, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following condition is met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */ + sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */ + sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */ + ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */ +} + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > rom + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + /* .bss section which is used for uninitialized data */ + .bss ALIGN(4) (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + } > ram + + . = ALIGN(4); + _end = . ; + + /* .stack_dummy section doesn't contains any symbols. It is only + used for linker to calculate size of stack sections, and assign + values to stack symbols later */ + .stack_dummy : + { + *(.stack*) + } > ram + + /* Set stack top to end of ram, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(ram) + LENGTH(ram); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(_sstack = __StackLimit); + PROVIDE(_estack = __StackTop); +} diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld new file mode 100644 index 0000000000..2a0d54e179 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld @@ -0,0 +1,145 @@ +/* ---------------------------------------------------------------------------- + * SAM Software Package License + * ---------------------------------------------------------------------------- + * Copyright (c) 2012, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following condition is met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */ + sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */ + sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */ + ram (rwx) : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */ +} + +/* The stack size used by the application. NOTE: you need to adjust */ +STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x2000 ; + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > ram + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + } > ram + + /* stack section */ + .stack (NOLOAD): + { + . = ALIGN(8); + _sstack = .; + . = . + STACK_SIZE; + . = ALIGN(8); + _estack = .; + } > ram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ram + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _end = . ; +} + diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf new file mode 100644 index 0000000000..956230fbd3 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf @@ -0,0 +1,49 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ +/*-Vector table start*/ +define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/ +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; +define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; +define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; +define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000; +define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF; +define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000; +define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF; +/*-Sizes-*/ +/*define symbol __ICFEDIT_size_cstack__ = 0x1000;*//*for nandflash*/ +define symbol __ICFEDIT_size_cstack__ = 0x2000; +define symbol __ICFEDIT_size_heap__ = 0x200; +/*-Specials-*/ +/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/ +/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/ +/*-Exports-*/ +/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/ +export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/ +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/ +/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/ +define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; +define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; +/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | + mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/ +define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__]; +define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__]; + +/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/ +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/ +place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; /*Add for CMSIS*/ +place in ROM0_region { readonly }; +place in RAM0_region { readwrite, block HEAP }; +place in RAM1_region { block CSTACK }; /* for nandflash*/ +/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ \ No newline at end of file diff --git a/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf new file mode 100644 index 0000000000..d7d33537ac --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ +/*-Vector table start*/ +define symbol __ICFEDIT_vector_start__ = 0x20000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; +define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; +define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x900; +define symbol __ICFEDIT_size_heap__ = 0x200; +/*-Exports-*/ +export symbol __ICFEDIT_vector_start__; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; +define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; +/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | + mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ + +/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */ +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; +place in RAM0_region { readonly }; +place in RAM1_region { readwrite, block CSTACK, block HEAP }; diff --git a/buildroot/share/PlatformIO/variants/archim/pins_arduino.h b/buildroot/share/PlatformIO/variants/archim/pins_arduino.h new file mode 100644 index 0000000000..4e279aa7be --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/pins_arduino.h @@ -0,0 +1,21 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +// API compatibility +#include "variant.h" + diff --git a/buildroot/share/PlatformIO/variants/archim/variant.cpp b/buildroot/share/PlatformIO/variants/archim/variant.cpp new file mode 100644 index 0000000000..72ad45ef46 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/variant.cpp @@ -0,0 +1,485 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "variant.h" + +/* + * DUE Board pin | PORT | Label + * ----------------+--------+------- + * 0 | PA8 | "RX0" + * 1 | PA9 | "TX0" + * 2 TIOA0 | PB25 | + * 3 TIOA7 | PC28 | + * 4 NPCS1 | PA29 | + * TIOB6 | PC26 | + * 5 TIOA6 | PC25 | + * 6 PWML7 | PC24 | + * 7 PWML6 | PC23 | + * 8 PWML5 | PC22 | + * 9 PWML4 | PC21 | + * 10 NPCS0 | PA28 | + * TIOB7 | PC29 | + * 11 TIOA8 | PD7 | + * 12 TIOB8 | PD8 | + * 13 TIOB0 | PB27 | LED AMBER "L" + * 14 TXD3 | PD4 | "TX3" + * 15 RXD3 | PD5 | "RX3" + * 16 TXD1 | PA13 | "TX2" + * 17 RXD1 | PA12 | "RX2" + * 18 TXD0 | PA11 | "TX1" + * 19 RXD0 | PA10 | "RX1" + * 20 | PB12 | "SDA" + * 21 | PB13 | "SCL" + * 22 | PB26 | + * 23 | PA14 | + * 24 | PA15 | + * 25 | PD0 | + * 26 | PD1 | + * 27 | PD2 | + * 28 | PD3 | + * 29 | PD6 | + * 30 | PD9 | + * 31 | PA7 | + * 32 | PD10 | + * 33 | PC1 | + * 34 | PC2 | + * 35 | PC3 | + * 36 | PC4 | + * 37 | PC5 | + * 38 | PC6 | + * 39 | PC7 | + * 40 | PC8 | + * 41 | PC9 | + * 42 | PA19 | + * 43 | PA20 | + * 44 | PC19 | + * 45 | PC18 | + * 46 | PC17 | + * 47 | PC16 | + * 48 | PC15 | + * 49 | PC14 | + * 50 | PC13 | + * 51 | PC12 | + * 52 NPCS2 | PB21 | + * 53 | PB14 | + * 54 | PA16 | "A0" + * 55 | PA24 | "A1" + * 56 | PA23 | "A2" + * 57 | PA22 | "A3" + * 58 TIOB2 | PA6 | "A4" + * 69 | PA4 | "A5" + * 60 TIOB1 | PA3 | "A6" + * 61 TIOA1 | PA2 | "A7" + * 62 | PB17 | "A8" + * 63 | PB18 | "A9" + * 64 | PB19 | "A10" + * 65 | PB20 | "A11" + * 66 | PB15 | "DAC0" + * 67 | PB16 | "DAC1" + * 68 | PA1 | "CANRX" + * 69 | PA0 | "CANTX" + * 70 | PA17 | "SDA1" + * 71 | PA18 | "SCL1" + * 72 | PC30 | LED AMBER "RX" + * 73 | PA21 | LED AMBER "TX" + * 74 MISO | PA25 | + * 75 MOSI | PA26 | + * 76 SCLK | PA27 | + * 77 NPCS0 | PA28 | + * 78 NPCS3 | PB23 | unconnected! + * + * USB pin | PORT + * ----------------+-------- + * ID | PB11 + * VBOF | PB10 + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Pins descriptions + */ +extern const PinDescription g_APinDescription[]= +{ + // 0 .. 53 - Digital pins + // ---------------------- + // 0/1 - UART (Serial) + { PIOA, PIO_PA8A_URXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // URXD + { PIOA, PIO_PA9A_UTXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // UTXD + + // 2 + { PIOB, PIO_PB25B_TIOA0, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC0_CHA0 }, // TIOA0 + { PIOC, PIO_PC28B_TIOA7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA7 }, // TIOA7 + { PIOC, PIO_PC26B_TIOB6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB6 }, // TIOB6 + + // 5 + { PIOC, PIO_PC25B_TIOA6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA6 }, // TIOA6 + { PIOC, PIO_PC24B_PWML7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH7, NOT_ON_TIMER }, // PWML7 + { PIOC, PIO_PC23B_PWML6, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH6, NOT_ON_TIMER }, // PWML6 + { PIOC, PIO_PC22B_PWML5, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH5, NOT_ON_TIMER }, // PWML5 + { PIOC, PIO_PC21B_PWML4, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH4, NOT_ON_TIMER }, // PWML4 + // 10 + { PIOC, PIO_PC29B_TIOB7, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB7 }, // TIOB7 + { PIOD, PIO_PD7B_TIOA8, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHA8 }, // TIOA8 + { PIOD, PIO_PD8B_TIOB8, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC2_CHB8 }, // TIOB8 + + // 13 - AMBER LED + { PIOB, PIO_PB27B_TIOB0, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM, TC0_CHB0 }, // TIOB0 + + // 14/15 - USART3 (Serial3) + { PIOD, PIO_PD4B_TXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD3 + { PIOD, PIO_PD5B_RXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD3 + + // 16/17 - USART1 (Serial2) + { PIOA, PIO_PA13A_TXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD1 + { PIOA, PIO_PA12A_RXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD1 + + // 18/19 - USART0 (Serial1) + { PIOA, PIO_PA11A_TXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TXD0 + { PIOA, PIO_PA10A_RXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // RXD0 + + // 20/21 - TWI1 + { PIOB, PIO_PB12A_TWD1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWD1 - SDA0 + { PIOB, PIO_PB13A_TWCK1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWCK1 - SCL0 + + // 22 + { PIOB, PIO_PB26, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 22 + { PIOA, PIO_PA14, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 23 + { PIOA, PIO_PA15, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 24 + { PIOD, PIO_PD0, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 25 + + // 26 + { PIOD, PIO_PD1, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 26 + { PIOD, PIO_PD2, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 27 + { PIOD, PIO_PD3, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 28 + { PIOD, PIO_PD6, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 29 + + // 30 + { PIOD, PIO_PD9, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 30 + { PIOA, PIO_PA7, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 31 + { PIOD, PIO_PD10, ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 32 + { PIOC, PIO_PC1, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 33 + + // 34 + { PIOC, PIO_PC2, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 34 + { PIOC, PIO_PC3, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 35 +//{ PIOC, PIO_PC3B_PWMH0, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH0, NOT_ON_TIMER }, // PWMH0 PIN 35 + { PIOC, PIO_PC4, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 36 + { PIOC, PIO_PC5, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 37 +//{ PIOC, PIO_PC5B_PWMH1, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH1, NOT_ON_TIMER }, // PWMH1 PIN 37 + + // 38 + { PIOC, PIO_PC6, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 38 + { PIOC, PIO_PC7, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 39 +//{ PIOC, PIO_PC7B_PWMH2, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH2, NOT_ON_TIMER }, // PWMH2 PIN 39 + { PIOC, PIO_PC8, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 40 +//{ PIOC, PIO_PC8B_PWML3, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH3, NOT_ON_TIMER }, // PWML3 PIN 40 + { PIOC, PIO_PC9, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 41 + + // 42 + { PIOA, PIO_PA19, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 42 + { PIOA, PIO_PA20, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 43 + { PIOC, PIO_PC19, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 44 +//{ PIOC, PIO_PC19B_PWMH5, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), NO_ADC, NO_ADC, PWM_CH5, NOT_ON_TIMER }, // PWMH5 PIN 44 + { PIOC, PIO_PC18, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 45 + + // 46 + { PIOC, PIO_PC17, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 46 + { PIOC, PIO_PC16, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 47 + { PIOC, PIO_PC15, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 48 + { PIOC, PIO_PC14, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 49 + + // 50 + { PIOC, PIO_PC13, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 50 + { PIOC, PIO_PC12, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 51 + { PIOB, PIO_PB21, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 52 + { PIOB, PIO_PB14, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 53 + + + // 54 .. 65 - Analog pins + // ---------------------- + { PIOA, PIO_PA16X1_AD7, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC0, ADC7, NOT_ON_PWM, NOT_ON_TIMER }, // AD0 + { PIOA, PIO_PA24X1_AD6, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC1, ADC6, NOT_ON_PWM, NOT_ON_TIMER }, // AD1 + { PIOA, PIO_PA23X1_AD5, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC2, ADC5, NOT_ON_PWM, NOT_ON_TIMER }, // AD2 + { PIOA, PIO_PA22X1_AD4, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC3, ADC4, NOT_ON_PWM, NOT_ON_TIMER }, // AD3 + // 58 +//{ PIOA, PIO_PA6X1_AD3, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC4, ADC3, NOT_ON_PWM, TC0_CHB2 }, // AD4 + { PIOA, PIO_PA6A_TIOB2, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_TIMER|PIN_ATTR_DIGITAL), ADC4, ADC3, NOT_ON_PWM, TC0_CHB2 }, // TIOB2 + { PIOA, PIO_PA4X1_AD2, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC5, ADC2, NOT_ON_PWM, NOT_ON_TIMER }, // AD5 + { PIOA, PIO_PA3X1_AD1, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC6, ADC1, NOT_ON_PWM, TC0_CHB1 }, // AD6 + { PIOA, PIO_PA2X1_AD0, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC7, ADC0, NOT_ON_PWM, TC0_CHA1 }, // AD7 + // 62 + { PIOB, PIO_PB17X1_AD10, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC8, ADC10, NOT_ON_PWM, NOT_ON_TIMER }, // AD8 + { PIOB, PIO_PB18X1_AD11, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC9, ADC11, NOT_ON_PWM, NOT_ON_TIMER }, // AD9 + { PIOB, PIO_PB19X1_AD12, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC10, ADC12, NOT_ON_PWM, NOT_ON_TIMER }, // AD10 + { PIOB, PIO_PB20X1_AD13, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC11, ADC13, NOT_ON_PWM, NOT_ON_TIMER }, // AD11 + + // 66/67 - DAC0/DAC1 + { PIOB, PIO_PB15X1_DAC0, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC12, DA0, NOT_ON_PWM, NOT_ON_TIMER }, // DAC0 + { PIOB, PIO_PB16X1_DAC1, ID_PIOB, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC13, DA1, NOT_ON_PWM, NOT_ON_TIMER }, // DAC1 + + // 68/69 - CANRX0/CANTX0 + { PIOA, PIO_PA1A_CANRX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, ADC14, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANRX + { PIOA, PIO_PA0A_CANTX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, ADC15, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANTX + + // 70/71 - TWI0 + { PIOA, PIO_PA17A_TWD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWD0 - SDA1 + { PIOA, PIO_PA18A_TWCK0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // TWCK0 - SCL1 + + // 72/73 - LEDs + { PIOC, PIO_PC30, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // LED AMBER RXL + { PIOA, PIO_PA21, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // LED AMBER TXL + + // 74/75/76 - SPI + { PIOA, PIO_PA25A_SPI0_MISO,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // MISO + { PIOA, PIO_PA26A_SPI0_MOSI,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // MOSI + { PIOA, PIO_PA27A_SPI0_SPCK,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // SPCK + + // 77 - SPI CS0 + { PIOA, PIO_PA28A_SPI0_NPCS0,ID_PIOA,PIO_PERIPH_A,PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS0 + + // 78 - SPI CS3 (unconnected) + { PIOB, PIO_PB23B_SPI0_NPCS3,ID_PIOB,PIO_PERIPH_B,PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS3 + + // 79 .. 84 - "All pins" masks + + // 79 - TWI0 all pins + { PIOA, PIO_PA17A_TWD0|PIO_PA18A_TWCK0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 80 - TWI1 all pins + { PIOB, PIO_PB12A_TWD1|PIO_PB13A_TWCK1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 81 - UART (Serial) all pins + { PIOA, PIO_PA8A_URXD|PIO_PA9A_UTXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 82 - USART0 (Serial1) all pins + { PIOA, PIO_PA11A_TXD0|PIO_PA10A_RXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 83 - USART1 (Serial2) all pins + { PIOA, PIO_PA13A_TXD1|PIO_PA12A_RXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 84 - USART3 (Serial3) all pins + { PIOD, PIO_PD4B_TXD3|PIO_PD5B_RXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + + // 85 - USB +//{ PIOB, PIO_PB11A_UOTGID|PIO_PB10A_UOTGVBOF, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // ID - VBOF + // 85 - PB11 only + { PIOB, PIO_PB11A_UOTGID, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // ID - VBOF + + // 86 - SPI CS2 + { PIOB, PIO_PB21B_SPI0_NPCS2, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS2 + + // 87 - SPI CS1 + { PIOA, PIO_PA29A_SPI0_NPCS1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // NPCS1 + + // 88/89 - CANRX1/CANTX1 (same physical pin for 66/53) + { PIOB, PIO_PB15A_CANRX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANRX1 + { PIOB, PIO_PB14A_CANTX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // CANTX1 + + // 90 .. 91 - "All CAN pins" masks + // 90 - CAN0 all pins + { PIOA, PIO_PA1A_CANRX0|PIO_PA0A_CANTX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + // 91 - CAN1 all pins + { PIOB, PIO_PB15A_CANRX1|PIO_PB14A_CANTX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, + + // 92 - Extra AMBIT Pins + { PIOC, PIO_PC11, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 92 + { PIOB, PIO_PB2, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 93 + { PIOB, PIO_PB1, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 94 + { PIOB, PIO_PB0, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 95 + { PIOC, PIO_PC10, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 96 + { PIOB, PIO_PB24, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 97 + { PIOB, PIO_PB7, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 98 + { PIOB, PIO_PB6, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 99 + { PIOB, PIO_PB8, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 100 + { PIOB, PIO_PB5, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 101 + { PIOB, PIO_PB4, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 102 + { PIOB, PIO_PB3, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 103 + { PIOC, PIO_PC20, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 104 + { PIOB, PIO_PB22, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 105 + { PIOC, PIO_PC27, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 106 + { PIOB, PIO_PB10B_A18, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 107 + { PIOB, PIO_PB9, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 108 + { PIOA, PIO_PA5, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // DIO PIN 109 + + // END + { NULL, 0, 0, PIO_NOT_A_PIN, PIO_DEFAULT, 0, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER } +} ; + + +uint8_t g_pinStatus[PINS_COUNT] = {0}; + +#ifdef __cplusplus +} +#endif + +/* + * UART objects + */ +RingBuffer rx_buffer1; +RingBuffer tx_buffer1; + +UARTClass Serial(UART, UART_IRQn, ID_UART, &rx_buffer1, &tx_buffer1); +void serialEvent() __attribute__((weak)); +void serialEvent() { } + +// IT handlers +void UART_Handler(void) +{ + Serial.IrqHandler(); +} + +// ---------------------------------------------------------------------------- +/* + * USART objects + */ +RingBuffer rx_buffer2; +RingBuffer rx_buffer3; +RingBuffer rx_buffer4; +RingBuffer tx_buffer2; +RingBuffer tx_buffer3; +RingBuffer tx_buffer4; + +USARTClass Serial1(USART0, USART0_IRQn, ID_USART0, &rx_buffer2, &tx_buffer2); +void serialEvent1() __attribute__((weak)); +void serialEvent1() { } +USARTClass Serial2(USART1, USART1_IRQn, ID_USART1, &rx_buffer3, &tx_buffer3); +void serialEvent2() __attribute__((weak)); +void serialEvent2() { } +USARTClass Serial3(USART3, USART3_IRQn, ID_USART3, &rx_buffer4, &tx_buffer4); +void serialEvent3() __attribute__((weak)); +void serialEvent3() { } + +// IT handlers +void USART0_Handler(void) +{ + Serial1.IrqHandler(); +} + +void USART1_Handler(void) +{ + Serial2.IrqHandler(); +} + +void USART3_Handler(void) +{ + Serial3.IrqHandler(); +} + +// ---------------------------------------------------------------------------- + +void serialEventRun(void) +{ + if (Serial.available()) serialEvent(); + if (Serial1.available()) serialEvent1(); + if (Serial2.available()) serialEvent2(); + if (Serial3.available()) serialEvent3(); +} + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +void __libc_init_array(void); + +void init( void ) +{ + SystemInit(); + + // Set Systick to 1ms interval, common to all SAM3 variants + if (SysTick_Config(SystemCoreClock / 1000)) + { + // Capture error + while (true); + } + + // Initialize C library + __libc_init_array(); + + // Disable pull-up on every pin + for (unsigned i = 0; i < PINS_COUNT; i++) + digitalWrite(i, LOW); + + // Enable parallel access on PIO output data registers + PIOA->PIO_OWER = 0xFFFFFFFF; + PIOB->PIO_OWER = 0xFFFFFFFF; + PIOC->PIO_OWER = 0xFFFFFFFF; + PIOD->PIO_OWER = 0xFFFFFFFF; + + // Set USB Full Speed for Archim + udd_low_speed_disable(); + udd_high_speed_disable(); + + // Initialize Serial port U(S)ART pins + PIO_Configure( + g_APinDescription[PINS_UART].pPort, + g_APinDescription[PINS_UART].ulPinType, + g_APinDescription[PINS_UART].ulPin, + g_APinDescription[PINS_UART].ulPinConfiguration); + digitalWrite(0, HIGH); // Enable pullup for RX0 + PIO_Configure( + g_APinDescription[PINS_USART0].pPort, + g_APinDescription[PINS_USART0].ulPinType, + g_APinDescription[PINS_USART0].ulPin, + g_APinDescription[PINS_USART0].ulPinConfiguration); + PIO_Configure( + g_APinDescription[PINS_USART1].pPort, + g_APinDescription[PINS_USART1].ulPinType, + g_APinDescription[PINS_USART1].ulPin, + g_APinDescription[PINS_USART1].ulPinConfiguration); + PIO_Configure( + g_APinDescription[PINS_USART3].pPort, + g_APinDescription[PINS_USART3].ulPinType, + g_APinDescription[PINS_USART3].ulPin, + g_APinDescription[PINS_USART3].ulPinConfiguration); + + // Initialize USB pins + PIO_Configure( + g_APinDescription[PINS_USB].pPort, + g_APinDescription[PINS_USB].ulPinType, + g_APinDescription[PINS_USB].ulPin, + g_APinDescription[PINS_USB].ulPinConfiguration); + + // Initialize CAN pins + PIO_Configure( + g_APinDescription[PINS_CAN0].pPort, + g_APinDescription[PINS_CAN0].ulPinType, + g_APinDescription[PINS_CAN0].ulPin, + g_APinDescription[PINS_CAN0].ulPinConfiguration); + PIO_Configure( + g_APinDescription[PINS_CAN1].pPort, + g_APinDescription[PINS_CAN1].ulPinType, + g_APinDescription[PINS_CAN1].ulPin, + g_APinDescription[PINS_CAN1].ulPinConfiguration); + + // Initialize Analog Controller + pmc_enable_periph_clk(ID_ADC); + adc_init(ADC, SystemCoreClock, ADC_FREQ_MAX, ADC_STARTUP_FAST); + adc_configure_timing(ADC, 0, ADC_SETTLING_TIME_3, 1); + adc_configure_trigger(ADC, ADC_TRIG_SW, 0); // Disable hardware trigger. + adc_disable_interrupt(ADC, 0xFFFFFFFF); // Disable all ADC interrupts. + adc_disable_all_channel(ADC); + + // Initialize analogOutput module + analogOutputInit(); +} + +#ifdef __cplusplus +} +#endif + diff --git a/buildroot/share/PlatformIO/variants/archim/variant.h b/buildroot/share/PlatformIO/variants/archim/variant.h new file mode 100644 index 0000000000..56f6414202 --- /dev/null +++ b/buildroot/share/PlatformIO/variants/archim/variant.h @@ -0,0 +1,284 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef _VARIANT_ARDUINO_DUE_X_ +#define _VARIANT_ARDUINO_DUE_X_ + +/*---------------------------------------------------------------------------- + * Definitions + *----------------------------------------------------------------------------*/ + +/** Frequency of the board main oscillator */ +#define VARIANT_MAINOSC 12000000 + +/** Master clock frequency */ +#define VARIANT_MCK 84000000 + +/*---------------------------------------------------------------------------- + * Headers + *----------------------------------------------------------------------------*/ + +#include "Arduino.h" +#ifdef __cplusplus +#include "UARTClass.h" +#include "USARTClass.h" +#endif + +#ifdef __cplusplus +extern "C"{ +#endif // __cplusplus + +/** + * Libc porting layers + */ +#if defined ( __GNUC__ ) /* GCC CS3 */ +# include /** RedHat Newlib minimal stub */ +#endif + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ + +// Number of pins defined in PinDescription array +#define PINS_COUNT (79u) +#define NUM_DIGITAL_PINS (66u) +#define NUM_ANALOG_INPUTS (12u) +#define analogInputToDigitalPin(p) ((p < 12u) ? (p) + 54u : -1) + +#define digitalPinToPort(P) ( g_APinDescription[P].pPort ) +#define digitalPinToBitMask(P) ( g_APinDescription[P].ulPin ) +//#define analogInPinToBit(P) ( ) +#define portOutputRegister(port) ( &(port->PIO_ODSR) ) +#define portInputRegister(port) ( &(port->PIO_PDSR) ) +#define digitalPinHasPWM(P) ( g_APinDescription[P].ulPWMChannel != NOT_ON_PWM || g_APinDescription[P].ulTCChannel != NOT_ON_TIMER ) + +/* + * portModeRegister(..) should return a register to set pin mode + * INPUT or OUTPUT by setting the corresponding bit to 0 or 1. + * Unfortunately on SAM architecture the PIO_OSR register is + * read-only and can be set only through the enable/disable registers + * pair PIO_OER/PIO_ODR. + */ +// #define portModeRegister(port) ( &(port->PIO_OSR) ) + +/* + * digitalPinToTimer(..) is AVR-specific and is not defined for SAM + * architecture. If you need to check if a pin supports PWM you must + * use digitalPinHasPWM(..). + * + * https://github.com/arduino/Arduino/issues/1833 + */ +// #define digitalPinToTimer(P) + +// Interrupts +#define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1) + +// LEDs +#define PIN_LED_13 (13u) +#define PIN_LED_RXL (72u) +#define PIN_LED_TXL (73u) +#define PIN_LED PIN_LED_13 +#define PIN_LED2 PIN_LED_RXL +#define PIN_LED3 PIN_LED_TXL +#define LED_BUILTIN 13 + +/* + * SPI Interfaces + */ +#define SPI_INTERFACES_COUNT 1 + +#define SPI_INTERFACE SPI0 +#define SPI_INTERFACE_ID ID_SPI0 +#define SPI_CHANNELS_NUM 4 +#define PIN_SPI_SS0 (77u) +#define PIN_SPI_SS1 (87u) +#define PIN_SPI_SS2 (86u) +#define PIN_SPI_SS3 (78u) +#define PIN_SPI_MOSI (75u) +#define PIN_SPI_MISO (74u) +#define PIN_SPI_SCK (76u) +#define BOARD_SPI_SS0 (77u) //(10u) +#define BOARD_SPI_SS1 (4u) +#define BOARD_SPI_SS2 (52u) +#define BOARD_SPI_SS3 PIN_SPI_SS3 +#define BOARD_SPI_DEFAULT_SS BOARD_SPI_SS3 + +#define BOARD_PIN_TO_SPI_PIN(x) \ + (x==BOARD_SPI_SS0 ? PIN_SPI_SS0 : \ + (x==BOARD_SPI_SS1 ? PIN_SPI_SS1 : \ + (x==BOARD_SPI_SS2 ? PIN_SPI_SS2 : PIN_SPI_SS3 ))) +#define BOARD_PIN_TO_SPI_CHANNEL(x) \ + (x==BOARD_SPI_SS0 ? 0 : \ + (x==BOARD_SPI_SS1 ? 1 : \ + (x==BOARD_SPI_SS2 ? 2 : 3))) + +static const uint8_t SS = BOARD_SPI_SS0; +static const uint8_t SS1 = BOARD_SPI_SS1; +static const uint8_t SS2 = BOARD_SPI_SS2; +static const uint8_t SS3 = BOARD_SPI_SS3; +static const uint8_t MOSI = PIN_SPI_MOSI; +static const uint8_t MISO = PIN_SPI_MISO; +static const uint8_t SCK = PIN_SPI_SCK; + +/* + * Wire Interfaces + */ +#define WIRE_INTERFACES_COUNT 2 + +#define PIN_WIRE_SDA (20u) +#define PIN_WIRE_SCL (21u) +#define WIRE_INTERFACE TWI1 +#define WIRE_INTERFACE_ID ID_TWI1 +#define WIRE_ISR_HANDLER TWI1_Handler +#define WIRE_ISR_ID TWI1_IRQn + +#define PIN_WIRE1_SDA (70u) +#define PIN_WIRE1_SCL (71u) +#define WIRE1_INTERFACE TWI0 +#define WIRE1_INTERFACE_ID ID_TWI0 +#define WIRE1_ISR_HANDLER TWI0_Handler +#define WIRE1_ISR_ID TWI0_IRQn + +static const uint8_t SDA = PIN_WIRE_SDA; +static const uint8_t SCL = PIN_WIRE_SCL; +static const uint8_t SDA1 = PIN_WIRE1_SDA; +static const uint8_t SCL1 = PIN_WIRE1_SCL; + +/* + * UART/USART Interfaces + */ +// Serial +#define PINS_UART (81u) +// Serial1 +#define PINS_USART0 (82u) +// Serial2 +#define PINS_USART1 (83u) +// Serial3 +#define PINS_USART3 (84u) + +/* + * USB Interfaces + */ +#define PINS_USB (85u) + +/* + * Analog pins + */ +static const uint8_t A0 = 54; +static const uint8_t A1 = 55; +static const uint8_t A2 = 56; +static const uint8_t A3 = 57; +static const uint8_t A4 = 58; +static const uint8_t A5 = 59; +static const uint8_t A6 = 60; +static const uint8_t A7 = 61; +static const uint8_t A8 = 62; +static const uint8_t A9 = 63; +static const uint8_t A10 = 64; +static const uint8_t A11 = 65; +static const uint8_t DAC0 = 66; +static const uint8_t DAC1 = 67; +static const uint8_t CANRX = 68; +static const uint8_t CANTX = 69; +#define ADC_RESOLUTION 12 + +/* + * Complementary CAN pins + */ +static const uint8_t CAN1RX = 88; +static const uint8_t CAN1TX = 89; + +// CAN0 +#define PINS_CAN0 (90u) +// CAN1 +#define PINS_CAN1 (91u) + + +/* + * DACC + */ +#define DACC_INTERFACE DACC +#define DACC_INTERFACE_ID ID_DACC +#define DACC_RESOLUTION 12 +#define DACC_ISR_HANDLER DACC_Handler +#define DACC_ISR_ID DACC_IRQn + +/* + * PWM + */ +#define PWM_INTERFACE PWM +#define PWM_INTERFACE_ID ID_PWM +#define PWM_FREQUENCY 31000 +#define PWM_MAX_DUTY_CYCLE 255 +#define PWM_MIN_DUTY_CYCLE 0 +#define PWM_RESOLUTION 8 + +/* + * TC + */ +#define TC_INTERFACE TC0 +#define TC_INTERFACE_ID ID_TC0 +#define TC_FREQUENCY 100000 +#define TC_MAX_DUTY_CYCLE 255 +#define TC_MIN_DUTY_CYCLE 0 +#define TC_RESOLUTION 8 + +#ifdef __cplusplus +} +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + +extern UARTClass Serial; +extern USARTClass Serial1; +extern USARTClass Serial2; +extern USARTClass Serial3; + +#endif + +// These serial port names are intended to allow libraries and architecture-neutral +// sketches to automatically default to the correct port name for a particular type +// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, +// the first hardware serial port whose RX/TX pins are not dedicated to another use. +// +// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor +// +// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial +// +// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library +// +// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. +// +// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX +// pins are NOT connected to anything by default. +#define SERIAL_PORT_MONITOR Serial +#define SERIAL_PORT_USBVIRTUAL SerialUSB +#define SERIAL_PORT_HARDWARE_OPEN Serial1 +#define SERIAL_PORT_HARDWARE_OPEN1 Serial2 +#define SERIAL_PORT_HARDWARE_OPEN2 Serial3 +#define SERIAL_PORT_HARDWARE Serial +#define SERIAL_PORT_HARDWARE1 Serial1 +#define SERIAL_PORT_HARDWARE2 Serial2 +#define SERIAL_PORT_HARDWARE3 Serial3 + +#endif /* _VARIANT_ARDUINO_DUE_X_ */ + diff --git a/platformio.ini b/platformio.ini index c426c5223b..1f2586e26b 100644 --- a/platformio.ini +++ b/platformio.ini @@ -576,8 +576,10 @@ build_flags = ${common.build_flags} [common_DUE_archim] platform = atmelsam extends = env:DUE +board = archim build_flags = ${common.build_flags} -DARDUINO_SAM_ARCHIM -DARDUINO_ARCH_SAM -D__SAM3X8E__ -DUSBCON +board_build.variants_dir = buildroot/share/PlatformIO/variants/ extra_scripts = ${common.extra_scripts} Marlin/src/HAL/DUE/upload_extra_script.py