Shorter paths to HAL, ExtUI (#17156)

2020-03-13 16:29:29 -05:00
parent ad980a72f7
commit 6bead0c1b0
600 changed files with 228 additions and 227 deletions
--- a/Marlin/src/HAL/SAMD51/persistent_store_eeprom.cpp
+++ b/Marlin/src/HAL/SAMD51/persistent_store_eeprom.cpp
@@ -0,0 +1,129 @@
+/**
+ * Marlin 3D Printer Firmware
+ *
+ * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
+ * SAMD51 HAL developed by Giuliano Zaro (AKA GMagician)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#ifdef __SAMD51__
+
+#include "../../inc/MarlinConfig.h"
+
+#if ENABLED(EEPROM_SETTINGS)
+
+#include "../shared/persistent_store_api.h"
+
+#if ENABLED(FLASH_EEPROM_EMULATION)
+  #define NVMCTRL_CMD(c)    do{                                                 \
+                              SYNC(!NVMCTRL->STATUS.bit.READY);                 \
+                              NVMCTRL->INTFLAG.bit.DONE = true;                 \
+                              NVMCTRL->CTRLB.reg = c | NVMCTRL_CTRLB_CMDEX_KEY; \
+                              SYNC(NVMCTRL->INTFLAG.bit.DONE);                  \
+                            }while(0)
+  #define NVMCTRL_FLUSH()   do{                                           \
+                              if (NVMCTRL->SEESTAT.bit.LOAD)              \
+                                NVMCTRL_CMD(NVMCTRL_CTRLB_CMD_SEEFLUSH);  \
+                            }while(0)
+#endif
+
+bool PersistentStore::access_start() {
+  #if ENABLED(FLASH_EEPROM_EMULATION)
+    NVMCTRL->SEECFG.reg = NVMCTRL_SEECFG_WMODE_BUFFERED;  // Buffered mode and segment reallocation active
+  #endif
+
+  return true;
+}
+
+bool PersistentStore::access_finish() {
+  #if ENABLED(FLASH_EEPROM_EMULATION)
+    NVMCTRL_FLUSH();
+    if (!NVMCTRL->SEESTAT.bit.LOCK)
+      NVMCTRL_CMD(NVMCTRL_CTRLB_CMD_LSEE);    // Lock E2P data write access
+  #endif
+
+  return true;
+}
+
+bool PersistentStore::write_data(int &pos, const uint8_t *value, size_t size, uint16_t *crc) {
+  #if ENABLED(FLASH_EEPROM_EMULATION)
+    if (NVMCTRL->SEESTAT.bit.RLOCK)
+      NVMCTRL_CMD(NVMCTRL_CTRLB_CMD_USEE);    // Unlock E2P data write access
+  #endif
+
+  while (size--) {
+    const uint8_t v = *value;
+    #if ENABLED(FLASH_EEPROM_EMULATION)
+      SYNC(NVMCTRL->SEESTAT.bit.BUSY);
+      if (NVMCTRL->INTFLAG.bit.SEESFULL)
+        NVMCTRL_FLUSH();      // Next write will trigger a sector reallocation. I need to flush 'pagebuffer'
+      ((volatile uint8_t *)SEEPROM_ADDR)[pos] = v;
+      SYNC(!NVMCTRL->INTFLAG.bit.SEEWRC);
+    #else
+      uint8_t * const p = (uint8_t * const)pos;
+      if (v != eeprom_read_byte(p)) {
+        eeprom_write_byte(p, v);
+        delay(2);
+        if (eeprom_read_byte(p) != v) {
+          SERIAL_ECHO_MSG(STR_ERR_EEPROM_WRITE);
+          return true;
+        }
+      }
+    #endif
+    crc16(crc, &v, 1);
+    pos++;
+    value++;
+  }
+  return false;
+}
+
+bool PersistentStore::read_data(int &pos, uint8_t* value, size_t size, uint16_t *crc, const bool writing/*=true*/) {
+  while (size--) {
+    uint8_t c;
+    #if ENABLED(FLASH_EEPROM_EMULATION)
+      SYNC(NVMCTRL->SEESTAT.bit.BUSY);
+      c = ((volatile uint8_t *)SEEPROM_ADDR)[pos];
+    #else
+      c = eeprom_read_byte((uint8_t*)pos);
+    #endif
+    if (writing) *value = c;
+    crc16(crc, &c, 1);
+    pos++;
+    value++;
+  }
+  return false;
+}
+
+size_t PersistentStore::capacity() {
+  #if ENABLED(FLASH_EEPROM_EMULATION)
+    const uint8_t psz = NVMCTRL->SEESTAT.bit.PSZ,
+                  sblk = NVMCTRL->SEESTAT.bit.SBLK;
+
+         if (!psz && !sblk)         return     0;
+    else if (psz <= 2)              return (0x200 << psz);
+    else if (sblk == 1 || psz == 3) return  4096;
+    else if (sblk == 2 || psz == 4) return  8192;
+    else if (sblk <= 4 || psz == 5) return 16384;
+    else if (sblk >= 9 && psz == 7) return 65536;
+    else                            return 32768;
+  #else
+    return E2END + 1;
+  #endif
+}
+
+#endif // EEPROM_SETTINGS
+
+#endif // __SAMD51__