thebears/marlin_skr
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Less use of "this"

Browse Source
This commit is contained in:
Scott Lahteine
2019-09-25 08:29:59 -05:00
parent 661c3cfc99
commit 0b4aedf13e
14 changed files with 245 additions and 248 deletions
Download Patch File Download Diff File Expand all files Collapse all files

75
Marlin/src/HAL/HAL_STM32F1/SPI.cpp
View File

@@ -213,31 +213,31 @@ void SPIClass::setDataSize(uint32_t datasize) {
}
void SPIClass::setDataMode(uint8_t dataMode) {
/*
Notes:
As far as we know the AVR numbers for dataMode match the numbers required by the STM32.
From the AVR doc http://www.atmel.com/images/doc2585.pdf section 2.4
SPI Mode CPOL CPHA Shift SCK-edge Capture SCK-edge
0 0 0 Falling Rising
1 0 1 Rising Falling
2 1 0 Rising Falling
3 1 1 Falling Rising
On the STM32 it appears to be
bit 1 - CPOL : Clock polarity
(This bit should not be changed when communication is ongoing)
0 : CLK to 0 when idle
1 : CLK to 1 when idle
bit 0 - CPHA : Clock phase
(This bit should not be changed when communication is ongoing)
0 : The first clock transition is the first data capture edge
1 : The second clock transition is the first data capture edge
If someone finds this is not the case or sees a logic error with this let me know ;-)
*/
/**
* Notes:
* As far as we know the AVR numbers for dataMode match the numbers required by the STM32.
* From the AVR doc http://www.atmel.com/images/doc2585.pdf section 2.4
*
* SPI Mode CPOL CPHA Shift SCK-edge Capture SCK-edge
* 0 0 0 Falling Rising
* 1 0 1 Rising Falling
* 2 1 0 Rising Falling
* 3 1 1 Falling Rising
*
* On the STM32 it appears to be
*
* bit 1 - CPOL : Clock polarity
* (This bit should not be changed when communication is ongoing)
* 0 : CLK to 0 when idle
* 1 : CLK to 1 when idle
*
* bit 0 - CPHA : Clock phase
* (This bit should not be changed when communication is ongoing)
* 0 : The first clock transition is the first data capture edge
* 1 : The second clock transition is the first data capture edge
*
* If someone finds this is not the case or sees a logic error with this let me know ;-)
*/
_currentSetting->dataMode = dataMode;
uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_CPOL|SPI_CR1_CPHA);
_currentSetting->spi_d->regs->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA));
@@ -593,7 +593,7 @@ void SPIClass::detachInterrupt() {
// Should be disableInterrupt()
}
/*
/**
* Pin accessors
*/
@@ -613,25 +613,14 @@ uint8_t SPIClass::nssPin() {
return dev_to_spi_pins(_currentSetting->spi_d)->nss;
}
/*
/**
* Deprecated functions
*/
uint8_t SPIClass::send(uint8_t data) { write(data); return 1; }
uint8_t SPIClass::send(uint8_t *buf, uint32_t len) { write(buf, len); return len; }
uint8_t SPIClass::recv() { return read(); }
uint8_t SPIClass::send(uint8_t data) {
this->write(data);
return 1;
}
uint8_t SPIClass::send(uint8_t *buf, uint32_t len) {
this->write(buf, len);
return len;
}
uint8_t SPIClass::recv() {
return this->read();
}
/*
/**
* DMA call back functions, one per port.
*/
#if BOARD_NR_SPI >= 1
@@ -650,7 +639,7 @@ uint8_t SPIClass::recv() {
}
#endif
/*
/**
* Auxiliary functions
*/
static const spi_pins* dev_to_spi_pins(spi_dev *dev) {